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楼主: bestdesign

[讨论] Frequency Err 到底怎么调整?

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发表于 2006-1-25 05:25:00 | 显示全部楼层
OK. Got you.

I don't divide reference freq, instead I divide feed back freq. Also Iuse Fractional_N  translational Loop  offset PLL. It isdifferent.

Thanks,
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发表于 2006-1-25 19:23:00 | 显示全部楼层
超过40 贴,在这个论坛讨论半天竟然没有人说出个所以然来,可惜可惜啊。
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发表于 2006-1-26 12:33:00 | 显示全部楼层
36楼   26M不可能是0.1ppm的
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发表于 2006-1-26 12:37:00 | 显示全部楼层
Phase and frequency error measurements are complex, The test
receiver or analyzer samples the transmitter output in order to capture the
actual phase trajectory. This is then demodulated and mathematically the
ideal phase trajectory is derived. Subtracting one from the other results in
an error signal. The mean gradient of this signal (phase/time) gives frequency
error. The variation of this signal is defined as phase error and is expressed
in terms of root mean squared (rms) and peak.[br]<p align=right><font color=red>+3 RD币</font></p>
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发表于 2006-1-28 13:09:00 | 显示全部楼层

frequency error

PLL需要基準,so needed to check the pll reference clock frequency to meet the tolence.
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发表于 2007-5-15 17:49:00 | 显示全部楼层
怎么回事情啊
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发表于 2007-5-15 20:28:00 | 显示全部楼层
报告BZ,有人考古[em02]
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发表于 2007-5-17 13:40:00 | 显示全部楼层
探古ing
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