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[FPGA资料] 优秀设计的十条戒律

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发表于 2006-4-7 18:46:00 | 显示全部楼层 |阅读模式
【文件名】:0647@52RD_优秀设计的十条戒律.rar
【格 式】:rar
【大 小】:90K
【简 介】:Synchronous digital systems are pervasive in today’s designs. Engineers create
clocked circuits for every conceivable application, with frequencies from DC to
GHz. Every synchronous system employs certain common characteristics, and
is prone to a group of common faults. These faults can cause instability and
unreliability, and may not be uncovered in the typical design process. The net
result is a poor product that fails to meet the design criteria, and the engineer
has to go through the suffering of design modification and revision. This is timeconsuming
and costly. However, by applying a few simple rules, you can avoid
synchronous design faults in your designs and achieve consistent first-pass
success. In this article you’ll learn the sources of the most common problems
and their solutions, and how to apply these ideas to your designs.
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发表于 2008-8-21 11:17:00 | 显示全部楼层
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发表于 2008-8-29 08:36:00 | 显示全部楼层
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