关于带隙基准的一片论文 A Low Noise CMOS Voltage Reference

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【文件名】:0618@52RD_关于带隙基准的一片论文.pdf
【简　介】:
An engineering dissertation is never the work of a single individual, but instead a
product of the labor of many contributors. While this thesis is the result of much effort
by myself and Dr. J. Alvin Connelly, to a lesser extent it is also the result of the efforts of
those who laid the groundwork of my career and profession. Every teacher, every coworker,
every member of my family, every friend I have known, and all the engineers
and scientists who developed the technologies discussed in this document are no less an
author of this dissertation than I am. Their influences, both great and small, gave me the
means and desire to perform this research and earn my doctorate.
I would like to give special thanks to the faculty of the School of Electrical and
Computer Engineering at the Georgia Institute of Technology for their instruction and
assistance throughout my graduate school experience. I would especially like to thank
Dr. Al Connelly for his understanding, support, and suggestions throughout this research.
Any student would be hard pressed to find an advisor who could do as fine a job as he
has for me. Most of all, I want to thank my family for their love and support, especially
my parents, Bill and Sue Holman. They gave me the support and opportunities I needed
to earn my degrees and become a part of the engineering profession.
Remember that a thesis is not just a collection of drawings, equations, and
measurements. An engineering dissertation is part of a miracle, a miracle that
encompasses the efforts of many people - past, present, and future - in the fields of
science and engineering. Every day I am awed by the technologies and the ideas that
have altered the world in my lifetime alone. It amazes me that such miracles could exist,
and I am proud to be a participant in their creation.
【目　录】:
iv
Page
SUMMARY........................................................................................ 1
INTRODUCTION ................................................................................ 2
CHAPTER I - QUANTIFYING CMOS VOLTAGE REFERENCE
PERFORMANCE................................................................................. 4
Voltage Reference Accuracy .................................................................... 4
Relative Accuracy in a Voltage Reference..................................................... 6
CHAPTER II - AN ANALYSIS OF STANDARD CMOS BANDGAP
REFERENCES .................................................................................... 13
A Theoretical Analysis of Bandgap Reference Temperature Coefficient ................. 16
Higher-Order Temperature Compensation..................................................... 21
Intrinsic Noise in CMOS Bandgap References................................................ 26
Intrinsic Noise Sources in CMOS Components............................................... 26
A Small-Signal Analysis of Simple Bandgap Voltage References ......................... 28
The Operational Amplifier Bandgap Reference Circuit...................................... 28
The PTAT Current Source Bandgap Reference Circuit...................................... 33
Other Design Considerations for CMOS Bandgap Voltage References ................... 39
CHAPTER III - A PRACTICAL LOW NOISE CMOS BANDGAP
REFERENCE TOPOLOGY..................................................................... 44
Noise Multiplication versus Noise Addition................................................... 44
The DVBE Summing Bandgap Reference Topology ......................................... 46
The Operation of the DVBE Summing Bandgap Reference ................................. 47
Temperature Dependence of the DVBE Summing Bandgap Reference.................... 50
A Noise Analysis of the DVBE Summing Bandgap Reference.............................. 60
CHAPTER IV - NONIDEAL COMPONENTS IN THE LOW NOISE CMOS
BANDGAP REFERENCE....................................................................... 69
The Lateral PNP Bipolar Transistor ............................................................ 69
Lateral PNP Transistor Layout and Characteristics........................................... 75
The Lateral PNP Transistor as a Floating Diode.............................................. 84
The Darlington "Pseudo-BiCMOS" Low Noise Amplifier.................................. 91
Nonideal Characteristics of the DBiLNA Buffer Amplifier................................. 95
Input Offset Voltage Variation in the Buffer Amplifier...................................... 98
CHAPTER V - THE DVBE SUMMING BANDGAP REFERENCE......................102
Layout and Fabrication ...........................................................................102
Simulation of the DVBE Summing Bandgap Reference......................................113
Experimental Results .............................................................................115
Reference Output Voltage and Quiescent Current............................................116
Temperature Coefficient..........................................................................117
Output Noise .......................................................................................122
Minimum Operating Voltage and Power Supply Rejection .................................126
CHAPTER VI - FUTURE DIRECTIONS FOR THE LOW NOISE CMOS
BANDGAP REFERENCE.......................................................................130
An Improved DVBE Summing Subcircuit......................................................130
A New Method of High-Order Temperature Compensation ................................135
An Improved DVBE Summing Bandgap Reference ..........................................139
A Low Noise Fractional Bandgap Reference..................................................143
CONCLUSIONS AND RECOMMENDATIONS............................................147
Conclusions ........................................................................................147
Recommendations for Future Research ........................................................148
BIBLIOGRAPHY.................................................................................150
APPENDIX A - PSPICE LISTING FOR THE DVBE SUMMING BANDGAP
REFERENCE SIMULATION...................................................................155
APPENDIX B - PSPICE LISTING FOR THE IMPROVED DVBE SUMMING
BANDGAP REFERENCE SIMULATION ...................................................160
VITA................................................................................................166
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