Design of Analog CMOS Integrated Circuits by Behzad Razavi

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Errata in Problem Sets
Chapter 2
 In Eq. (2.44), n must be in the numerator.
Chapter 3
 Call the third problem 3.2’.
 In Problem 3.2, Fig. 3.68(d), change the gate voltage ofM2
to Vb2.
 In Problem 3.4, Fig. 3.71(a), change the gate voltage of
M=1 to Vb1.
 In Fig. 3.72(e), Vb1 must be changed to Vin.
 In Fig. 3.73(h), the output is at the source of M2.
 In Problem3.10(c), the questionmust be phrased as: Which
device enters the triode region first as Vout falls?
 In Problem3.13, first sentence should read: ... withW=L =
50=0:5 ...
 In Problem 3.16(a), do not neglect channel-length modulation
in the triode region.
Chapter 4
 In Problem4.2, assume ISS = 1 mA and change part (a) t
Determine the voltage gain.
 In Problem 4.6, assume  = 0.
 In Problem 4.9, assume  =
= 0.
 In Problem 4.11, assume ID5 = 20 A.
 In Problem 4.13, change the figure number to 4.8(a).
Chapter 5
 In Problem 5.16(d), assume VTH does not vary with temperature.
Chapter 6
 In Problem 6.4(b) and (d), assume  6= 0.
Chapter 7
 The second sentence of Problem 7.2 should read: Assume
(W=L)1 = 50=0:5; ID1 = ID2 = 0:1 mA ...
 In Problem 7.20, change ID1 and ID2 to 0.05 mA.
 In Problem 7.24, change the bias current to 0.1 mA.
Chapter 8
 In Problem 8.10, change the tolerable gain error to 5%.
 In Problem 8.15, Fig. 8.55(b), call label the top Gm block
Gm2. The output is at the output nodes of Gm2.
Chapter 10
 In Problem 10.11, change ISS to 0.25 mA and (W=L)5;6 to
60/0.5.
 In Problem 10.12, add: Maximize VGS14 = VGS15 while
leaving at least 0.5 V across I1. Also, in part (b), change M2
toM1.
 Problem 10.17 should read: ... between the gate and the
drain of M2 or M3.
 In Fig. 10.42, change the gate voltage ofM3;4 to Vb1.
 In Problem 10.19(c), change A0 in the numerator to A.
Chapter 11
 In Problem 11.13, ... such that the circuit operates with
VDD = 3 V.
 In Problems 11.17 and 11.18, the top terminal of R2 should
be connected to the top terminal of R1.
 In Problem 11.22, assume K = 4.
Chapter 12
 In Problem 12.8, assume CH = 1 pF.
 In Problem 12.12, assume all switches are NMOS devices.
 In Problem 12.14, assume Cin = 0:2 pF and calculate C1
and C2.
 In Problem 12.16, the output is sensed at the drains of M1
and M2.
Chapter 13
 In Problem 13.5, change the figure number to 13.6(a).
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Design of Analog CMOS Integrated Circuits
by Behzad Razavi
影印的，上面是勘误纪录
[upload=jpg]UploadFile/2005-12/051223@52RD_an.jpg[/upload]

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