免费资料！精典异步时钟域设计资料，共勉！

bosen

免费！
Synthesis and Scripting Techniques for Designing Multi-
Asynchronous Clock Designs ；Clifford E. Cummings
非常精典的异步时钟域设计文章。


【文件名】:07427@52RD_AsyncClkDesign.pdf
【格　式】:pdf
【大　小】:178K
【简　介】:Designing a pure, one-clock synchronous design is a luxury that few ASIC designers will ever
know. Most of the ASICs that are ever designed are driven by multiple asynchronous clocks and
require special data, control-signal and verification handling to insure the timely completion of a
robust working design.
【目　录】:

bosen

在这里帖上
【文件名】:07427@52RD_AsyncClkDesign(1).pdf
【格　式】:pdf
【大　小】:178K
【简　介】:
【目　录】:
[br]<p align=right><font color=red>+5 RD币</font></p>

wrenhawk

谢谢lz

icebergreal

haode ,xiexie

wapon

谢谢lz了 ~~~[em03][em05]