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[资料] 高速数字电路设计及EMC设计

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发表于 2007-4-13 21:22:24 | 显示全部楼层 |阅读模式
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??【文件名】:07413@52RD_高速数字电路设计及EMC设计.rar

??【格 式】:rar

??【大 小】:611K

??【简 介】:

??【目 录】:

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??1.高速数字电路设计..................................................................................................................5

??1.1何谓高速数字信号?....................................................................................................5

??1.2微带线、带状线的概念.................................................................................................5

??1.2.1微带线(Microstrip)..........................................................................................5

??1.2.2带状线(Stripline).............................................................................................6

??1.2.3经验数据............................................................................................................6

??1.2.4同轴线(coaxialcable)......................................................................................6

??1.2.5双绞线(twisted-paircable)...............................................................................7

??1.2.6等间隔的电容负载的影响...................................................................................7

??1.3常见高速电路..............................................................................................................8

??1.3.1ECL(EmitterCoupledLogic)电路......................................................................8

??1.3.2CML(CurrentModeLogic)电路........................................................................9

??1.3.3GTL(GunningTransceiverLogic)电路............................................................10

??1.3.4BTL(BackplaneTransceiverLogic)电路...........................................................10

??1.3.5TTL(TransistorTransistorLogic)电路.............................................................11

??1.3.6模数转换电路—线接收器.................................................................................12

??1.4常见电路匹配措施.....................................................................................................12

??1.4.1反射.................................................................................................................12

??1.4.2终端匹配..........................................................................................................13

??1.4.3始端匹配..........................................................................................................15

??1.5高速电路设计一般原则和调试方法............................................................................16

??1.5.1同步逻辑设计...................................................................................................16

??1.5.2了解选用器件的输入、输出结构,选用恰当的匹配电路;在考虑节省功耗,电路又能容许的情况下,可适当地引入失配。...........................................................................................................19

??1.5.3对极高速率(300MHz以上)的信号,一般建议选用互补逻辑,以降低对电源的要求。19

??1.5.4了解每一根高速信号电流的流向(电流环)......................................................19

??1.5.5信号的布线、电源和地层的分割,是否符合微带线、带状线的要求?高速信号要有回路地相配(不是屏蔽地)................................................................................................................................19

??1.5.6电源滤波..........................................................................................................19

??1.5.7对很高速度的信号要估算其走线延迟。.............................................................19

??1.5.8在满足速度要求的前提下,尽量选用工作速率低的器件。19

??1.5.9差分线尽量靠近走线.........................................................................................19

??1.5.10测试方法:选择有50Ω输入的高速示波器,一般自制一个探头,测量点应尽量靠近所观察的位置或者需要该信号的实际位置。一般不建议测输出端的信号波形,与实际使用的位置有一定差别。19

??1.5.11ringing,crosstalk,radiatednoise——数字系统的三种噪声19

??1.5.12数字信号的绝大部分能量(功率谱密度)集中在fknee之内19

??1.5.13延时:FR4PCB,outertrace:140~180ps/inchinnertrace:180ps/inch20

??1.5.14集总参数与分布参数系统...............................................................................20

??1.5.15互感、耦合电容的作用(干扰)....................................................................20

??1.5.16ECL电路的上升时间、下降时间的计算...........................................................20

??1.5.17在数字系统中,耦合电容引起的串扰比起互感引起的串扰要小。21

??1.5.18传输通道包括器件封装、PCB布局、连接器,至少在fknee的范围内要有平坦的频响,以保证信号不失真,否则信号在收端可能会遇到上升时间劣化、过冲、振铃、lump等现象。...................21

??1.5.19阻容负载对电流变化的作用...........................................................................21

??1.5.20噪声容限(noiseimmunity):以10H189器件为例...........................................22

??1.5.21地反弹(groundbounce)............................................................................23

??1.5.22寄生电容StrayCapacitance的影响:对于高输入阻抗电路影响尤为严重23

??1.5.23示波器探针的电气模型..................................................................................24

??1.5.2421:1探针:.....................................................................................................25

??1.5.25趋肤效应(skineffect):在高频时导线表面附近的电流密度加大,而中心部分的电流密度减小。趋肤效应使得导线对高频信号的衰减增大。趋肤效应的频率与导体的材料有关。.......................25

??1.5.26对低频信号,电流流经电阻最小的路径;对高频信号,回流路径的电感远比其电阻重要,高频电流流经电感最小的路径,而非电阻最小的路径。最小电感回流路径正好在信号导线的下面,以减小流出和流入电流通路间的环路面积。...........................................................................................................25

??1.5.27负载电容对上升时间的影响...........................................................................26

??1.5.28直流匹配和交流匹配的功耗比较....................................................................27

??1.5.29电源系统设计原则.........................................................................................27

??1.5.30TTL和ECL的混合系统要注意........................................................................ 27

??1.5.31 电源线上的电磁辐射防护............................................................................... 28

??1.5.32 旁路电容的选取和安装:............................................................................... 28

??1.5.33 连接器对高速系统的影响............................................................................... 28

??1.5.34 总线:........................................................................................................... 31

??2、电磁兼容性(Electromagnetic Compatibility)....................................................................... 32

??2.1 关于电磁兼容性的基本原理....................................................................................... 32

??2.1.1下面的电路布局有什么问题?........................................................................... 32

??2.1.2 走线可穿过回流平面的缝隙吗?No!.............................................................. 33

??2.1.3走线的电感和电容............................................................................................ 33

??2.1.4接地的作用:................................................................................................... 34

??2.1.5 信号参考点应在何处接至基底(chassis)............................................................. 35

??2.1.6周期信号......................................................................................................... 36

??2.1.7 EMC三要素..................................................................................................... 36

??2.1.8共模和差模....................................................................................................... 38

??2.1.9 减小噪声的措施............................................................................................... 39

??2.2 信号完整性――减小串扰和信号畸变......................................................................... 39

??2.2.1......................................................................................................................... 39

??2.2.2 屏蔽................................................................................................................ 40

??2.2.3 信号畸变......................................................................................................... 41

??2.3 通过滤波减小直流电源噪声....................................................................................... 41

??2.3.1......................................................................................................................... 42

??2.3.2 If DC power planes can’t be used, then lumped decoupling capacitors must be sized and placed correctly.42

??2.3.3 多层PCB、表贴电容,串联电感在何处?........................................................ 43

??2.3.4 How to distribute DC power from a single supply to both analog and digital circuits?43

??2.4 元件放置与信号层分配.............................................................................................. 44

??2.5 Reducing conducted & radiated emission & susceptibility................................................. 46

??2.6 电路板EMC准则总结................................................................................................ 48

??2.6.1 Component Placement........................................................................................ 48

??2.6.2 DC Power Distribution....................................................................................... 48

??2.6.3 Routing of Signal Output and Return Paths........................................................... 49

??2.6.4 Signal Integrity – Reducing Crosstalk and Distortion.............................................. 49

??2.6.5 High Frequency Transmission Lines..................................................................... 50

??2.6.6 Reducing Conducted and Radiated Emissions........................................................ 50

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