VHDL Programming by Example 1RD币

limingj

【文件名】:07331@52RD_VHDL Programming by Example.pdf
【格　式】:pdf
【大　小】:2413K
【简　介】:
【目　录】:



Chapter 1 Introduction to VHDL
Chapter 2 Behavioral Modeling 15
Chapter 3 Sequential Processing 39
Chapter 4 Data Types 73
Chapter 5 Subprograms and Packages 109
Chapter 6 Predefined Attributes 143
Chapter 7 Configurations 173
Chapter 8 Advanced Topics 205
Chapter 9 Synthesis
Chapter 10 VHDL Synthesis 251
Chapter 11 High Level Design Flow 273
Chapter 12 Top-Level System Design 289
Chapter 13 CPU: Synthesis Description 303
Chapter 14 CPU: RTL Simulation 329
Chapter 15 CPU Design: Synthesis Results 357
Chapter 16 Place and Route 369
Chapter 17 CPU: VITAL Simulation 379
Chapter 18 At Speed Debugging Techniques 399
Appendix A Standard Logic Package 413
Appendix B VHDL Reference Tables 435
Appendix C Reading VHDL BNF 445Appendix D VHDL93 Updates 449
Index 469
About the Author 477

seabird0813

这本书很不错，多谢楼主了