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[招聘信息] 思科上海研发中心招聘HW Design人才

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发表于 2007-3-7 15:58:40 | 显示全部楼层 |阅读模式
工作地点在上海。
有兴趣的朋友请把英文简历发到 zhengwei8516@gmail.com
请在标题注明你所申请的职位名称。
谢谢

HW Design[/COLOR]
JOB DESCRIPTION AND RESPONSIBILITIES
Participates on a project team of engineers responsible for the specification, design, development, test, enhancement, and sustaining of networking hardware. Responsible for board level architecture design and writes functional specs. Develops complex circuit designs for multiple modules incorporating newly developed custom ASICs. Designs moderate complexity programmable logic or FPGA. Responsible for the evaluation, selection, and qualification of complex components that may include newly developed technology. Partners with CAD and Manufacturing Engineers in developing new boards. Identifies and develops board level simulations where necessary. Work independently and/or under direction of project leaders. Interface with team members of ASIC, System Software, Diagnostic Software, and Mechanical Engineering. Consults with enclosure and other compliance engineers during design process to ensure compliance requirements will be met. Writes board level functional and design specs and hardware manuals. Performs complex board level unit and integration test. Debugs complex problems at the system level. Interfaces with and may provide guidance and leadership to test team members of Hardware DVT, Mechanical DVT, System Test, and Regulatory Compliance. Writes unit and integration test plans. Follows and contributes to standard design and implementation processes and procedures. Mentors more junior engineers in the completion of complex tasks. Participates in Cisco’s patent program. The following knowledge, skills, and expertise are desirable and may be required for these positions:
Requirement:
• Expertise developing printed circuit boards for digital systems
• Skill using schematic capture tools like Mentor Graphics’ ePD/DxDesigner (Viewdraw)
• Expertise using Networking silicon: PHYs, MACs, and Network Processors
• Familiarity with board level simulations for signal integrity, power integrity, and timing analysis
• Knowledge of power systems, power supplies, and DC-to-DC regulation concepts and components
• Expert knowledge of networking principles, theories and commonly used concepts


HW DESIGN ENGINEER (JUNIOR)
BSEE combined with 2-5 yrs related experience, or an MSEE combined with 1-4 years of related experience. Recent direct experience developing a printed circuit board, including the involvement in each of these activities: concept and architecture, circuit design, component selection, schematic capture, timing and power analysis, CAD layout, fabrication, debug, testing, and release to production


HW DESIGN ENGINEER (SENIOR)
BSEE combined with 5+ yrs related experience, or an MSEE combined with 4+ years of related experience. Recent direct experience developing numerous printed circuit boards, including participation in each of these activities: concept and architecture, circuit design, component selection, schematic capture, timing and power analysis, CAD layout, fabrication, debug, testing, and release to production.
Additional Requirement:
• Skill utilizing FPGAs, Verilog or VHDL language, simulations, timing analysis, and back-end compilation
• Expertise with high-speed SerDes design (>1Gbps), PLL design and LVDS, LVPECL, CML and other high-performance I/O technologies
• Expertise correlating simulation results with lab measurements using oscilloscopes, TDRs and spectrum analyzers
• Expertise designing to and testing for regulatory compliance: Safety, EMC, and Environmental
• Skill in the application of old and new networking technology into complex designs
• Expert knowledge of PCB technology
发表于 2007-4-29 16:37:30 | 显示全部楼层
[em07]
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发表于 2007-4-29 17:05:55 | 显示全部楼层
1.1
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发表于 2007-5-6 15:55:00 | 显示全部楼层
上海哪个区啊?
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