1.UNIVERSITY OF CALIFORNIA
Santa Barbara
1.0 - 2.0 GHz Wideband PLL CMOS Frequency Synthesizer
2.HIGH PERFORMANCE INTER-CHIP
SIGNALLING
Stefanos Sidiropoulos
Technical Report No. CSL-TR-98-760
3.DESIGN AND ANALYSIS OF A WIDE LOOP-BANDWIDTH RF SYNTHESIZER USING RING OSCILLATOR FOR DECT RECEIVER
4. top down design of a phase locked loop for a video driver system
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发表于 2006-12-26 16:32:48
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