PCB焊盘设计（英文版）

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rface Mount Design and Land Pattern Standard
1.0 SCOPE
This document provides information on land pattern geometries
used for the surface attachment of electronic components.
The intent of the information presented herein is to
provide the appropriate size, shape and tolerance of surface
mount land patterns to insure sufficient area for the appropriate
solder fillet, and also to allow for inspection and
testing of those solder joints.
1.1 Purpose Although, in many instances, the land pattern
geometries can be slightly different based on the type
of soldering used to attach the electronic part, wherever
possible, land patterns are defined in such a manner that
they are transparent to the attachment process being used.
Designers should be able to use the information contained
herein to establish standard configurations not only for
manual designs but also for computer aided design systems.
Whether parts are mounted on one or both sides of
the board, subjected to wave, reflow, or other type of soldering,
the land pattern and part dimensions should be optimized
to insure proper solder joint and inspection criteria.
Although patterns are standardized, since they are a part of
the printed board circuitry geometry, they are subject to the
producibility levels and tolerances associated with plating,
etching, or other conditions. The producibility aspects also
pertain to the use of solder mask and the registration
required between the solder mask and the conductor patterns.

【文件名】:06714@52RD_IPC-SM-782A.pdf
【格　式】:pdf
【大　小】:1536K
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