sigma-deltaADC的matlab建模

Louise

【文件名】:0666@52RD_Behavioral modeling of switched-capacitor sigma-delta modulators2003.rar
【格　式】:rar
【大　小】:1049K
【简　介】:Abstract—This paper presents a complete set of blocks implemented
in the popular MATLAB SIMULINK environment, which
allows designers to perform time-domain behavioral simulations
of switched-capacitor (SC) sigma–delta (
) modulators. The
proposed set of blocks takes into account most of the SC 

modulator nonidealities, such as sampling jitter, noise,
and operational amplifier parameters (white noise, finite dc gain,
finite bandwidth, slew rate and saturation voltages). For each
block, a description of the considered effect as well as all of the
implementative details are provided. The proposed simulation
environment is validated by comparing the simulated behavior
with the experimental results obtained from two actual circuits,
namely a second-order low-pass and a sixth-order bandpass SC

modulator.
modulators can be implemented either with continuous-
time or with sampled-data techniques. The most popular
approach is based on a sampled-data solution with switchedcapacitor
(SC) implementation. In fact, SC modulators
can be efficiently realized in standard CMOS technology
and included in complete mixed-signal systems without any
performance degradation. For this reason, we will focus on the
case of SC modulators in this paper.
In the design of a high-performance SC modulator, two
main issues have to be addressed by the designers.
1) Which is the best architecture to fulfill the application
【目　录】:
I. INTRODUCTION
II. MODULATOR NONIDEALITIES
III. CLOCK JITTER
IV. THERMAL AND OPERATIONAL AMPLIFIER NOISE
V. OPERATIONAL AMPLIFIER NONIDEALITIES
VI. SIMULATION RESULTS
VII. CONCLUSION

surer

<P>不就是篇ieee论文吗，还不如上maths网站上下application文档呢</P>

surer

<FONT color=#008000 size=2>www.designers-guide.org/Analysis</FONT>

iaman

<P>支持surer！</P>

nimade

是ieee论文吗，那就没意思  时时刻刻要有阻抗匹配的概念