Digital Storage Oscilloscope

nj_jack

数字存储示波器设计
【文件名】:0661@52RD_Digital Storage Oscilloscope.pdf
【格　式】:pdf
【大　小】:517K
【简　介】:数字存储示波器设计
【目　录】:Contents
1) Introduction 1
1.1) Previous Work 4
2) Theory 5
2.1) Digital Storage Oscilloscope Operation 5
2.2) PC Based Digital Storage Oscilloscope 6
2.3) Logic Analysers 7
2.4) Sample Rates and Aliasing 8
2.5) Storage Depth 10
3) Design 11
3.1) Initial Concept 11
3.2) Design Overview 13
3.2.1) Memory 13
3.2.2) Analogue To Digital Converter 14
3.2.3) Buffer Amplifier 15
3.2.4) Control Logic 15
3.2.5) Software 17
3.2.5.1) Main.c 19
3.2.5.2) Gui.c And Gui.rc 20
3.2.5.3) Plot_Data.c 21
3.2.5.4) DSO_IO.c 21
3.2.5.5) P_Port_IO.c 22
3.2.5.6) Numeric.c, File_IO.c, And Error.c 22
3.2.6) PC Interface 23
3.3) Detailed Design 24
3.3.1) FPGA Configuration 24
3.3.2) Pre-Trigger Mode 24
3.3.3) Trigger Detection Unit 27
3.3.4) Clock Generation 29
3.3.5) Tri-State Buses 30
3.3.6) Parallel Port Interface Logic 31
3.3.7) ADC Operation 31
3.3.8) PCB And Power Supplies 33
4) Results 35
4.1) Analogue Performance 35
4.2) Logic Analyser Performance 39
5) Discussion 42
5.1) Possible Improvements 44
5.1.1) Sample Rate 44
5.1.2) Triggering 44
5.1.3) Input Range 45
5.1.4) Parallel Port Interface 45
5.1.5) FPGA Migration 45
5.1.6) Software 46
6) Conclusion 47
7) References 49

landhan485

谢谢，谢谢

landhan485

谢谢，谢谢

landhan485

谢谢，谢谢

landhan485

谢谢，谢谢

landhan485

谢谢，谢谢