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【文件名】:06529@52RD_Waltari[1].part1.rar
【格 式】:rar
【大 小】:1457K
【简 介】:The increasing digitalization in all spheres of electronics applications, from telecommunications systems to consumer electronics appliances, requires analog-to-digital converters (ADCs) with a higher sampling rate, higher resolution, and lower power consumption. The evolution of integrated circuit technologies partially helps in meeting these requirements by providing faster devices and allowing for the realization
of more complex functions in a given silicon area, but simultaneously it brings new challenges, the most important of which is the decreasing supply voltage.
Based on the switched capacitor (SC) technique, the pipelined architecture has most successfully exploited the features of CMOS technology in realizing high-speed high-resolution ADCs. An analysis of the effects of the supply voltage and technology scaling on SC circuits is carried out, and it shows that benefits can be expected at least for the next few technology generations. The operational amplifier is a central building block in SC circuits, and thus a comparison of the topologies and their low voltage capabilities is presented.
Keywords: analog integrated circuit, analog-to-digital conversion, BiCMOS, bootstrapped switch, CMOS, double-sampling, IF-sampling, low voltage, operational amplifier,pipelined analog-to-digital converter, sample-and-hold circuit, switched-capacitor,switched-opamp, time interleaving.
【目 录】:
1 Introduction
2 Low Voltage Issues
3 Sample-and-Hold Operation
4 A/D Converters
5 S/H Circuit Architectures
6 Sampling with a MOS Transistor Switch
7 Operational Amplifiers
8 Clock Generation
9 Double-Sampling
10 Switched Opamp Technique
11 Other Low Voltage Techniques and Building Blocks 159
12 Prototypes and Experimental Results
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