MIPS 公司关于Gated clock技术说明

Rosalind

【文件名】:06511@52RD_gating_clocking_design.rar
【格　式】:rar
【大　小】:42K
【简　介】:Gated clocking is a true silver bullet for hardware designers. Using this technique, engineers can improve all three major performance metrics of a circuit: speed, area, and power. Unfortunately,EDA tools have traditionally lacked support for gated clocks. These limitations have relegated clock gating to the full-custom design community. However, new features in synthesis and static timing analysis tools have brought gated clocking to mainstream ASIC designers.
【目　录】:
1.0 Description of Problem
2.0 Gated Clocks and Synthesis
3.0 Gated Clocks and Primetime STA
4.0 Gated clocks and ATPG
5.0 Gated Clocks & CTS tools
6.0 Gated Clocks & Cell Libraries
7.0 Conclusions and Recommendations
8.0 Acknowledgments