芯片设计中的时钟树分析 资料下载

Adelaide

【文件名】:06510@52RD_CLOCK_report.rar
【格　式】:rar
【大　小】:251K
【简　介】:In this term paper, we study the different routing algorithms for the most critical signals in any given electrical environment, namely the clock, power and ground lines. The emphasis of our study is towards understanding both the algorithmic aspects, as well as the electrical factors that motivate the routing algorithms. Clock, power and ground signals are critical and are fed to almost all the circuit elements, hence their ability to tolerate signal irregularities is far less than the other less critical signals routed on a given chip surface. The algorithms we studied for clock distribution are motivated towards making the clock skew zero and minimizing the dynamic power dissipated by clocked circuit modules. On the other hand, the power and ground routing algorithms are designed mainly to maintain signal integrity levels while reaching the most distant circuit modules. The routing algorithms also ensure that transient effects on the power and ground lines are minimized.
【目　录】:无目录

Adelaide

【文件名】:06510@52RD_ingrid_DAC-1_02.rar
【格　式】:rar
【大　小】:698K
【简　介】:
【目　录】: