Using PrimeTime in LSI Logic’s FlexStream™ Design Flow

Nellie

【文件名】:06429@52RD_asc_pt.rar
【格　式】:rar
【大　小】:31K
【简　介】:Designers in the past have spent a huge portion of their overall design time performing functional and timing verification of the design. Using dynamic verification method, a designer would have to create an extremely large number of timing vectors to verify the timing paths in the design. As
the size and complexity of designs increase however it’s becoming almost impossible for a designer to create such a vector set to achieve complete coverage.
【目　录】:
1.0 Introduction
2.0 Static Timing Analysis Using Primetime in FlexStream design flow
3.0 PrimeTime at LSI
4.0 Summary