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PRODUCT PREVIEW
PublicVersion
OMAP4430
www.ti.com SWPS041D–DECEMBER2010–REVISEDJANUARY2012
5.1 TVOUTBufferMode(DAC +Buffer).................................................................................. 191
5.2 TVOUTBypassMode(DAC Only).................................................................................... 191
5.3 ElectricalSpecificationsOverRecommendedOperatingConditions............................................. 192
5.4 TVOUTBypassModeSpecifications(DAC-Only) ElectricalSpecificationsOverRecommended
OperatingConditions.................................................................................................... 195
5.5 AnalogSupply(vdda_hdmi_vdac)NoiseRequirements............................................................ 196
5.6 ExternalComponentValueChoice.................................................................................... 197
6 TimingRequirementsandSwitchingCharacteristics........................................................... 198
6.1 TimingTestConditions.................................................................................................. 198
6.2 Interface ClockSpecifications.......................................................................................... 198
6.2.1 Interface ClockTerminology................................................................................. 198
6.2.2 Interface ClockFrequency................................................................................... 198
6.2.3 ClockJitterSpecifications.................................................................................... 198
6.2.4 ClockDutyCycleError....................................................................................... 199
6.3 TimingParameters....................................................................................................... 199
6.4 ExternalMemoryInterface .............................................................................................. 199
6.4.1 General-PurposeMemoryController(GPMC) ............................................................ 200
6.4.1.1 GPMC/NORFlashInterface—SynchronousMode—100MHz............................. 200
6.4.1.2 GPMC/NORFlashInterface—SynchronousMode—66MHz.............................. 207
6.4.1.3 GPMC/NORFlashInterface—AsynchronousMode......................................... 217
6.4.1.4 GPMC/NANDFlashInterface—AsynchronousMode....................................... 225
6.4.2 ExternalMemoryInterface (EMIF) .......................................................................... 229
6.4.2.1 EMIF—DDRMode............................................................................... 229
6.5 MultimediaInterfaces .................................................................................................... 244
6.5.1 CameraInterface .............................................................................................. 244
6.5.1.1 CameraSerialInterface (CSI2) ................................................................. 245
6.5.1.2 CameraSerialInterface (CCP2—CSI22)..................................................... 247
6.5.2 DisplaySubsystemInterface ................................................................................ 249
6.5.2.1 DSS—DisplayController(DISPC) .............................................................. 249
6.5.2.2 DSS—RemoteFrameBufferInterface (RFBI) Applications................................ 252
6.5.2.3 DisplaySerialInterface (DSI1).................................................................. 259
6.5.2.4 HighDefinitionMultimediaInterface (HDMI) .................................................. 261
6.6 SerialCommunicationsInterfaces ..................................................................................... 261
6.6.1 MultichannelBufferedSerialPort(McBSP) ............................................................... 261
6.6.1.1 McBSP1,McBSP2,andMcBSP3Set#1...................................................... 262
6.6.1.2 McBSP3—I2S/PCM .............................................................................. 273
6.6.1.3 McBSP4—I2S/PCM .............................................................................. 279
6.6.2 MultichannelBufferedSerialPort(McASP) ............................................................... 284
6.6.3 MultichannelSerialPortInterface (McSPI) ................................................................ 286
6.6.3.1 McSPI—MCSPIInterface in TransmitandReceive—SlaveMode........................ 287
6.6.3.2 McSPI—McSPIInterface in TransmitandReceive—MasterMode........................ 292
6.6.4 DigitalMicrophone(DMIC) ................................................................................... 303
6.6.5 MultichannelPulseDensityModulation(McPDM) ........................................................ 306
6.6.6 SlimBus......................................................................................................... 308
6.6.6.1 ABESlimBus1,SlimBus2—SLIMBUSSDR24.6MHz...................................... 308
6.6.6.2 ABESlimBus1,SlimBus2—SLIMBUSSDR19.2MHz...................................... 310
6.6.7 High-SpeedSynchronousInterface (HSI) ................................................................. 312
6.6.7.1 High-SpeedSynchronousInterface 1.......................................................... 312
Copyright©2010–2012,TexasInstruments Incorporated Contents 5
PRODUCT PREVIEW
PublicVersion
OMAP4430
SWPS041D–DECEMBER2010–REVISEDJANUARY2012 www.ti.com
6.6.7.2 High-SpeedSynchronousInterface 2.......................................................... 314
6.6.8 UniversalSerialBus(USB) .................................................................................. 318
6.6.8.1 UniversalSerialBus(USB)—USBA0.......................................................... 318
6.6.8.2 UniversalSerialBus(USB)—USBC1.......................................................... 319
6.6.8.3 UniversalSerialBus(USB)—USBB1.......................................................... 324
6.6.8.4 UniversalSerialBus(USB)—USBB2.......................................................... 335
6.6.9 Inter-Integrated CircuitInterface (I
2
C)...................................................................... 346
6.6.9.1 I
2
CandSmartReflex—StandardandFastModes........................................... 347
6.6.9.2 I
2
CandSmartReflex—High-SpeedMode..................................................... 348
6.6.10 HDQ/ 1-WireInterface (HDQ/1-Wire) ...................................................................... 349
6.6.10.1 HDQ/ 1-Wire—HDQMode..................................................................... 349
6.6.10.2 HDQ/1-Wire—1-WireMode..................................................................... 351
6.6.11 UniversalAsynchronousReceiverTransmitter(UART) .................................................. 352
6.6.11.1 UART3IrDA ....................................................................................... 359
6.7 RemovableMediaInterfaces ........................................................................................... 361
6.7.1 MultimediaMemoryCardandSecureDigitalIO Card(SDMMC) ...................................... 361
6.7.1.1 MMC/SD/SDIO1Interface ...................................................................... 361
6.7.1.2 MMC/SD/SDIO2Interface ...................................................................... 370
6.7.1.3 MMC/SD/SDIO3,4,and5Interfaces ......................................................... 377
6.8 TestInterfaces ............................................................................................................ 380
6.8.1 DigitalProcessingManagerInterface (DPM) .............................................................. 380
6.8.1.1 TracePortInterface Unit(TPIU) ................................................................ 380
6.8.1.2 SystemTraceModuleInterface (STM) ........................................................ 381
6.8.2 JTAGInterface (JTAG) ....................................................................................... 385
6.8.2.1 JTAG—Free-RunningClockMode............................................................. 385
6.8.2.2 JTAG—AdaptiveClockMode................................................................... 387
6.8.3 cJTAGInterface (cJTAG) .................................................................................... 388
7 ThermalManagement....................................................................................................... 391
7.1 PackageThermalCharacteristics...................................................................................... 391
7.2 TemperatureSensorRecommendation............................................................................... 392
7.2.1 PCBTemperatureSensor ................................................................................... 392
7.2.2 JunctionTemperatureSensor............................................................................... 392
8 PackageCharacteristics................................................................................................... 394
8.1 DeviceNomenclature.................................................................................................... 394
8.1.1 StandardPackageSymbolization........................................................................... 394
8.1.2 SAPPartNumber............................................................................................. 395
8.1.3 DeviceNamingConvention.................................................................................. 395
8.2 MechanicalData......................................................................................................... 396
A OMAP4430ProcessorMultimediaDevicePCBGuideline...................................................... 397
A.1 Introduction ............................................................................................................... 397
A.2 Initial RequirementsandGuidelines................................................................................... 397
A.2.1 Introduction to the PCBGuidelines......................................................................... 397
A.2.2 PCBPowerGeneralRoutingGuidelines................................................................... 399
A.2.2.1 Step1:PCBStack-upGuidelines.............................................................. 399
A.2.2.2 Step2:PhysicalLayoutGuidelinesofthe PDN.............................................. 401
A.2.2.3 Step3:StaticIR DropPDNGuidelines........................................................ 406
A.2.3 LumpedandDistributedResistance/IRDropAnalysisMethodology.................................. 407
A.2.4 SystemESDGenericGuidelines............................................................................ 408
6 Contents Copyright©2010–2012,TexasInstruments Incorporated
PRODUCT PREVIEW
PublicVersion
OMAP4430
www.ti.com SWPS041D–DECEMBER2010–REVISEDJANUARY2012
A.2.4.1 IEC61000-4-2 StandardOverview—SystemESD........................................... 408
A.2.4.2 ObjectiveandLimitationofthe ProtectionStrategy.......................................... 410
A.2.4.3 ConceptofIsolation Impedance ................................................................ 410
A.2.4.4 SystemESDGenericPCBGuideline.......................................................... 410
A.2.4.5 MiscellaneousEMCGuidelinesto MitigateESDImmunity ................................. 411
A.3 Single-EndedInterfaces ................................................................................................. 412
A.3.1 GeneralRoutingGuidelines................................................................................. 412
A.3.2 Single-EndedPCBGuidelinein OMAP4................................................................... 413
A.3.2.1 OMAP4430Single-EndedInterfaces—PCBGuideline...................................... 413
A.3.2.2 OMAP4430Single-EndedInterfaces—OMAP4430SystemESDGuideline............. 416
A.4 DifferentialInterface PCBGuidelines................................................................................. 418
A.4.1 GeneralRoutingGuidelines................................................................................. 418
A.4.2 Three-stepDesignandValidationMethodologyfor OMAPBoards.................................... 419
A.4.2.1 Three-stepDesignandValidationMethodology—GeneralGuidelines.................... 419
A.4.2.2 Step1:GeneralGuidelinesfor OMAPBoards............................................... 420
A.4.2.3 Step2:LengthMismatchGuidelinesfor OMAPBoards.................................... 421
A.4.2.4 Step3:Frequency-domainSpecificationGuidelinesfor OMAPBoards.................. 422
A.4.3 MIPID-PHYPCBGuidelinesin OMAP4................................................................... 427
A.4.3.1 CSI21andCSI22MIPICSI-2@1Gbps(Up to 3DataLanes,OPP100),@824Mbps(Up
to 4DataLanes,OPP100),@800Mbps(Up to 4DataLanes,OPP50)DevicePCB
Guidelines......................................................................................... 427
A.4.3.2 DSI1andDSI2MIPIDSI1@900Mbps(Up to 3DataLanes),@824Mbps(Up to 4Data
Lanes)DevicePCBGuideline.................................................................. 429
A.4.4 USBA0PHYInterface in OMAP4........................................................................... 430
A.4.4.1 USBA0PHYPCBGuideline.................................................................... 430
A.4.4.2 USBA0PHYImplementation Example........................................................ 432
A.4.4.3 ESDImplementation—USBA0PHY........................................................... 433
A.4.5 HDMIInterface in OMAP4................................................................................... 433
A.5 TVOUTInterface in OMAP4............................................................................................ 433
A.5.1 TV-OUTPCBRequirements................................................................................. 434
A.5.1.1 SelfParasiticRequirements..................................................................... 434
A.5.1.2 MutualCapacitanceRequirements............................................................ 434
A.5.1.3 MutualInductance Requirements.............................................................. 435
A.5.2 TV-OUTImplementation Proposal.......................................................................... 435
A.5.3 ESDImplementation—TV-OUT............................................................................. 435
A.6 ClockGuidelines......................................................................................................... 436
A.6.1 32-kHzOscillatorRouting.................................................................................... 436
A.6.2 OscillatorGroundConnection............................................................................... 437
A.6.3 ElectromagneticInterference (EMI) Preventionin ClockDistribution.................................. 438
A.7 GroundGuidelines....................................................................................................... 438
A.7.1 GuardRingonPCBEdges.................................................................................. 438
A.7.2 AnalogandDigitalGround................................................................................... 439
B Glossary......................................................................................................................... 440
B.1 Glossary................................................................................................................... 440
【文件名】:12428@52RD_OMAP4430_ES.part1.rar
【文件名】:12428@52RD_OMAP4430_ES.part2.rar
【格 式】:rar
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