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[FPGA资料] 极有价值的一篇testbench初级读本

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发表于 2006-4-20 13:52:00 | 显示全部楼层 |阅读模式
【文件名】:06420@52RD_A Verilog HDL Test Bench Primer.rar
【格 式】:rar
【大 小】:57K
【简 介】:As digital systems become more complex, it becomes increasingly important to verify the functionality of a design before implementing it in a system. Hardware Descriptions Languages (HDL’s) have become extremely popular because the same language can be used by engineers for both designing and testing CPLD’s and FPGA’s. The two most common HDL’s are Verilog and VHDL. This document focuses on using Verilog HDL
to test digital systems, by giving the designer a handful of simulation techniques that can be used on the majority of digital applications.
【目 录】:无目录


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