【文件名】:06418@52RD_vlg_d1.rar
【格 式】:rar
【大 小】:143K
【简 介】: 一、Lattice Verilog Training Part I
二、Lattice Verilog Training Part II
【目 录】:
一、1.Basic Modeling Structure
2.Verilog Design Description
3. The Black Box Example
4. Simple Verilog Example
5.Verilog Design Description
6.DECLARATIONS
7.Data Types
8.Number Specification
二、1.Lattice Specific Design by Verilog
2. Global OE Polarity
3. Lattice Specific - Global OE
4. Global Reset Polarity
5. Lattice Specific - Global Reset
6. Global Reset and PT Reset
7. Lattice Specific - Lattice Macros
8.Lattice Specific - Wide XORs