[FPGA资料] 用velilog编程的codingstyle!好东西

发表于 2006-4-12 17:37:00 | 显示全部楼层 |阅读模式

【文件名】:06412@52RD_codingstyle.rar
【格　式】:rar
【大　小】:27K
【简　介】:These conventions mainly apply to synthesizable source RTL code. The other cases, such as testbench, drives, detailed behavioral model, can also refer to these rules.
【目　录】:无目录

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