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[FPGA资料] 资料:GAL16v8 的介绍

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发表于 2006-4-7 12:42:00 | 显示全部楼层 |阅读模式
【文件名】:0647@52RD_GAL16v8.rar
【格 式】:rar
【大 小】:281K
【简 介】:The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed I performance available in the PLD market. High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently.
【目 录】:无目录


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