这是老外给的一个时钟信号测试点单端匹配电路,
左思右想不知道这个电路的具体优点在哪里,倒是Howard大神在他的黑魔法书里那个21:1的测试电路比较清楚。
两个电容也使用的十分飘逸……
下面是老外自己的说明:
The diodes are there for protection if we get a transient from the SMB connector, the capacitor is there for DC separation. Having 22.1 ohms overall output termination estimates some series resistance in the chip driving the signal. The capacitor to ground is to filter out unwanted frequencies(above the actual signal of interest) on the signal.
The values need to be calculated for the specific frequencies. Or at least based on the highest frequency.
这个电路中电阻的作用只能是阻抗匹配,但是为什么要放置为两两并联的方式,而滤波电容又为什么要放置在并联电阻中间。这是一个时钟信号的测试电路,在电路中加入容性感性器件不是会减缓上升下降沿?特别是串联在电路中的电容,根据频响公式,见下,会对慢速信号有较大的畸变,而本电路会用于测试2M的PCM时钟信号。
元件细节已经放大,烦请大虾们给点意见。
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[此贴子已经被作者于2011-2-22 16:41:59编辑过] |