基于FPGA的IP camera高清网络摄像机参考设计

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基于FPGA的IP camera高清网络摄像机参考设计
【文件名】:101030@52RD_wp-01133-ip-camera.pdf
【格　式】:pdf
【大　小】:609K
【简　介】:
【目　录】:


IP Surveillance Camera Reference Design
Figure 1 shows the top-level block diagram and hardware of the IP Surveillance
Camera Reference Design, which targets the new generation of HD (>1 MP) WDR
sensors. The IP Surveillance Camera Reference Design combines hardware and
software intellectual property from Altera and a number of partners.
Figure 1. Block Diagram of IP Surveillance Camera Reference Design