DisplayPort sepc v1.1a
新一代的高清视频传输协议,最高可达10Gbps,v1.2升级到20Gbps。
有兴趣的可以下来看看。
【文件名】:10630@52RD_DisplayPort_Specification.pdf
【格 式】:pdf
【大 小】:2978K
【简 介】:
【目 录】:
1 INTRODUCTION ...................................................................................................................................14
1.1 DISPLAYPORT SPECIFICATION ORGANIZATION......................................................................................14
1.2 DISPLAYPORT OBJECTIVES ...................................................................................................................14
1.2.1 Key Industry Needs for DisplayPort ............................................................................................15
1.2.2 DisplayPort Technical Objectives................................................................................................15
1.2.3 DisplayPort External Connection Objectives ..............................................................................16
1.2.4 DisplayPort Internal Connection Objectives ...............................................................................17
1.2.5 DisplayPort CE Connection Objectives.......................................................................................17
1.2.6 Content Protection for DisplayPort .............................................................................................17
1.3 ACRONYMS...........................................................................................................................................17
1.4 GLOSSARY............................................................................................................................................20
1.5 REFERENCES........................................................................................................................................24
1.6 NOMENCLATURE FOR BIT AND BYTE ORDERING....................................................................................25
1.6.1 Bit Ordering ................................................................................................................................25
1.6.2 Byte Ordering..............................................................................................................................25
1.7 OVERVIEW OF DISPLAYPORT.................................................................................................................27
1.7.1 Make-up of the Main Link ............................................................................................................27
1.7.2 Make-up of AUX CH ....................................................................................................................28
1.7.3 Link Configuration and Management ..........................................................................................29
1.7.4 Layered, Modular Architecture....................................................................................................29
2 LINK LAYER..........................................................................................................................................31
2.1 INTRODUCTION...................................................................................................................................31
2.1.1 Number of Lanes and Per-lane Data Rate ...................................................................................32
2.1.2 Number of Main, Uncompressed Video Streams..........................................................................32
2.1.3 Basic Functions...........................................................................................................................32
2.1.4 DisplayPort Device Types and Link Topology.............................................................................32
2.2 ISOCHRONOUS TRANSPORT SERVICES.................................................................................................36
2.2.1 Main Stream to Main Link Lane Mapping in the Source Device .................................................36
2.2.2 Stream Reconstruction in the Sink ...............................................................................................60
2.2.3 Stream Clock Recovery ................................................................................................................62
2.2.4 Main Stream Attribute Data Transport........................................................................................64
2.2.5 Secondary-data Packing Formats................................................................................................68
2.2.6 ECC for Secondary-data Packet ..................................................................................................81
2.3 AUX CH STATES AND ARBITRATION .................................................................................................87
2.3.1 AUX CH STATES Overview.........................................................................................................87
2.3.2 Link Layer Arbitration Control ....................................................................................................91
2.3.3 Policy Maker AUX CH Management ...........................................................................................91
2.3.4 Detailed Source AUX CH State Description................................................................................91
2.3.5 Detailed Sink AUX CH State Description ....................................................................................92
2.4 AUX CH SYNTAX ...............................................................................................................................94
2.4.1 Command definition .....................................................................................................................95
2.4.2 AUX CH Response / Reply Time-outs ..........................................................................................97
2.4.3 Native AUX CH Request Transaction Syntax ..............................................................................97
2.4.4 Native AUX CH Reply Transaction Syntax ..................................................................................97
2.4.5 I2C bus transaction mapping onto AUX CH Syntax.....................................................................98
2.4.6 Conversion of I2C Transaction to Native AUX CH Transaction (INFORMATIVE) ..................116