Table of Content
Basics of SI___________________________________________________________________5
1.1 When Speed is important? _____________________________________________5
1.1.1 Acceptable Voltage and timing values ________________________________5
1.2 Signal Integrity ______________________________________________________5
1.2.1 Waveform Voltage Accuracy_______________________________________5
1.2.2 Timing_________________________________________________________5
1.3 Speed of currently used logic families ____________________________________5
1.3.1 Transition Electrical Length (TEL) __________________________________6
1.3.2 Critical length ___________________________________________________6
1.3.3 What is Transmission Line? ________________________________________6
1.3.4 What is moving in a Transmission line?_______________________________6
1.3.5 Power Plane Definition____________________________________________6
1.3.6 The concept of Ground ____________________________________________7
1.4 STRIPLINE circuit with Electromagnetic field _____________________________7
1.5 RLC Transmission Line Model _________________________________________8
1.5.1 What is Impedance? ______________________________________________8
1.5.2 A Practical impedance equation for microstrip _________________________8
1.5.3 What is relative dielectric constant Er? _______________________________9
2 Interconnections for High Speed Digital Circuits _______________________________10
2.1.1 Summary______________________________________________________10
2.2 Examples of dynamic interfacing problems _______________________________10
2.3 IC Technology and Signal Integrity_____________________________________12
2.4 Speed and distance __________________________________________________14
2.5 Digital signals: Static interfacing _______________________________________15
2.6 Digital signals: Dynamic interfacing ____________________________________16
2.7 Review questions ___________________________________________________18
3 Interconnection Models____________________________________________________20
3.1 Summary__________________________________________________________20
3.2 Reference model for interconnection analysis _____________________________20
3.3 Receiver model_____________________________________________________21
3.4 RC interconnection model ____________________________________________23
3.5 Parameters of the interconnection ______________________________________25
3.6 Refined models _____________________________________________________26
3.7 Review question ____________________________________________________28
4 Transmission Line Models _________________________________________________31
4.1 Summary__________________________________________________________31
4.2 Transmission line models _____________________________________________31
4.3 Loss- less transmission lines ___________________________________________32
4.4 Critical Length _____________________________________________________34
4.5 Reference transmission line model______________________________________35
4.6 Line driving _______________________________________________________36
4.7 Propagation and reflected waves _______________________________________37
4.8 A sample system____________________________________________________39
4.9 Review questions ___________________________________________________42
PCB Designer’s SI Guide Page 3 Venkata
5 Analysis techniques _______________________________________________________45
5.1 Summary__________________________________________________________45
5.2 Transmission time and skew___________________________________________45
5.3 Effects of termination resistance _______________________________________46
5.4 Lattice diagram _____________________________________________________48
5.5 Examples of Real Lines ______________________________________________49
5.6 Simulation code ____________________________________________________51
5.7 Examples of results__________________________________________________54
5.8 Review questions ___________________________________________________55
6 Design guide for interconnection ____________________________________________57
6.1 Summary__________________________________________________________57
6.2 Incident wave switching ______________________________________________57
6.3 Effects of capacitive loading __________________________________________58
6.4 Termination circuits _________________________________________________59
6.4.1 Passive termination______________________________________________60
6.4.2 Low power termination___________________________________________61
6.4.3 Active low power termination circuit. _______________________________61
6.5 Driving point-to-point lines ___________________________________________62
6.6 Driving bused lines __________________________________________________64
6.7 Design guidelines ___________________________________________________67
6.8 Review questions ___________________________________________________67
7 Signal Integrity in Digital Circuits ___________________________________________70
7.1 Crosstalk __________________________________________________________70
7.1.1 Summary______________________________________________________70
7.2 Examples of signal integrity problems ___________________________________70
7.3 Simplified Model for Crosstalk Analysis _________________________________71
7.4 Forward and backward crosstalk _______________________________________74
7.5 Examples__________________________________________________________76
7.6 Near-end and Far-end crosstalk ________________________________________80
7.7 Review questions ___________________________________________________81
8 Design Guide to Handle Crosstalk ___________________________________________85
8.1 Summary__________________________________________________________85
8.2 Effects of Crosstalk__________________________________________________85
8.3 Passive countermeasures _____________________________________________86
8.4 Active Control of Crosstalk ___________________________________________92
8.5 Review questions ___________________________________________________94
9 Ground Bounce and Switching Noise_________________________________________97
9.1 Summary__________________________________________________________97
9.2 The totem pole Current Spike__________________________________________97
9.3 Current flow in the output capacitance__________________________________100
9.4 Total Ground Bounce _______________________________________________100
9.5 Review questions __________________________________________________105
10 Design Guide for Ground & Power Distribution _____________________________107
10.1 Summary_________________________________________________________107
PCB Designer’s SI Guide Page 4 Venkata
10.2 Decoupling Capacitors ______________________________________________107
10.3 Placement of bypass Capacitors _______________________________________113
10.4 Ground and power distribution________________________________________114
10.5 Clock distribution __________________________________________________115
10.6 Review Questions __________________________________________________118
11 Laboratory Experience _________________________________________________120
11.1 Summary_________________________________________________________120
11.2 Aim of the experience_______________________________________________120
11.3 Generator Parameters _______________________________________________122
11.4 Cable Parameters __________________________________________________123
11.5 Mismatch at driver and at termination __________________________________124
11.6 Capacitive Load ___________________________________________________125
11.7 7. Time-domain reflectometer ________________________________________127
11.8 Driving the line with logic devices_____________________________________128
12 SI Analysis Strategy____________________________________________________133
12.1.1 A modern high-speed design methodology must involve the at least the
following: ____________________________________________________________133
12.2 POSSIBLE HIGH-SPEED DESIGN APPROACHES______________________133
12.2.1 There are two fundamental types of conditions that need to be considered for
solution space analysis:__________________________________________________134
12.3 SOLUTION SPACE ANALYSIS _____________________________________135
12.3.1 STEP 1 — DEFINING THE INITIAL TOPOLOGY __________________135
12.3.2 STEP 2 — DEFINE MANUFACTURING TOLERANCES AND THEIR
MIN/MAX VALUES ___________________________________________________135
12.3.3 STEP 3 — DEFINE THE STARTING POINT FOR DESIGN VARIANCES
136
12.3.4 STEP 4 — SET UP AND RUN A NUMBER OF SIMULATION CASES _136
12.3.5 STEP 5 — EXAMINE THE SIMULATION RESULTS, IDENTIFY WHICH
CASES FAILED AND WHY ____________________________________________136
12.3.6 STEP 6 — ADAPT THE TOPOLOGY AND DESIGN RULES AS
APPROPRIATE _______________________________________________________137
12.3.7 STEP 7 — REPEAT STEPS 4-6 UNTIL THE TOPOLOGY CONVERGES
ON A SET OF VALUES THAT PASS FOR ALL CASES ANALYZED __________137
12.3.8 STEP 8 — DERIVE DESIGN RULES FOR THE TARGET CAD SYSTEM
137
12.3.9 STEP 9 — DRIVE THE CAD RULES INTO THE CAD DATABASE, AND
USE THEM TO DRIVE THE PLACEMENT/ROUTING PROCESSES ___________138
12.3.10 STEP 10 — POST LAYOUT SI ANALYSIS ______________________139
12.4 CONCLUSION____________________________________________________139
13 Glossary _____________________________________________________________141[br]<p align=right><font color=red>+1 RD币</font></p>
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