找回密码
 注册
搜索
查看: 1182|回复: 1

[FPGA资料] 下载电缆原理图

[复制链接]
发表于 2006-3-27 11:27:00 | 显示全部楼层 |阅读模式
【文件名】:06327@52RD_下载电缆原理图.rar
【格 式】:rar
【大 小】:19K
【简 介】:共1页,内容是图片
【目 录】:无目录


本帖子中包含更多资源

您需要 登录 才可以下载或查看,没有账号?注册

×
 楼主| 发表于 2006-3-27 11:35:00 | 显示全部楼层
【文件名】:06327@52RD_Parallel Cable IV.rar
【格 式】:rar
【大 小】:147K
【简 介】:Download speed of up to 5 Megabits per second
(Mb/s)
• Over eight times faster than Xilinx Parallel Cable III
using Xilinx iMPACT (v4.2i or higher) download
software
• ChipScope™ ILA Pro compatible
• In-System Programs configures all Xilinx devices
- Virtex™/Virtex-E/Virtex-II/Virtex-II Pro™
- Spartan™/Spartan-XL/Spartan-II/Spartan-IIE/
Spartan-3
- XC9500™/XC9500XL/XC9500XV
- CoolRunner™ (XPLA3)/CoolRunner-II
- XC18V00™ ISP PROM family
- XC4000XL™/XV/EX/E
- System ACE™ Multi-Package Module (MPM)
- Platform Flash PROM family
• Automatically senses and adapts to correct I/O voltage
• Interfaces to devices operating at 5V (TTL), 3.3V
(LVTTL), 2.5V, 1.8V, and 1.5V
• Supports JTAG (IEEE 1149.1) and Xilinx Slave Serial
Modes
• J Drive IEEE 1532 Programming Engine compatible
• Includes high-performance ribbon cable
• Compliant with IEEE 1284 Level 2 Electrical
Specification
• Externally powered using keyboard/mouse splitter
cable or AC power brick
• LED status indicator
• Compatible with ECP-compliant I/O controllers for
high-speed, bidirectional communication
【目 录】:
1.Parallel Cable IV Description
2.Connecting to Host Computer
3.High Performance Ribbon Cable
4.Pinout Assignments
5.TDO Timing Specifications
6.Cable Power
7.Power Supply Sources
8.Status LED
9.Automatic I/O Voltage Sensing
10.PC IV Operating Characteristics



[此贴子已经被作者于2006-3-27 12:19:26编辑过]

本帖子中包含更多资源

您需要 登录 才可以下载或查看,没有账号?注册

×
点评回复

使用道具 举报

高级模式
B Color Image Link Quote Code Smilies

本版积分规则

Archiver|手机版|小黑屋|52RD我爱研发网 ( 沪ICP备2022007804号-2 )

GMT+8, 2024-11-23 07:47 , Processed in 0.062108 second(s), 17 queries , Gzip On.

Powered by Discuz! X3.5

© 2001-2023 Discuz! Team.

快速回复 返回顶部 返回列表