ieee-std-1364.pdf

tony_sh

【文件名】:0948@52RD_ieee-std-1364.pdf
【格　式】:pdf
【大　小】:1760K
【简　介】:基于verilog的硬件描述语言
共23章+ annexA~H
644页
【目　录】:

section1 Overview
section2 Lexical conventions
section3 Datatypes
section4 Expressions
section5 Scheduling Semantics
section6 Assignments
section7 Gate and switch level modeling
section8 UDPs
section9  Behavioral modeling
section10 tasks and functions
section11 Disabling of named blocks and tasks
section12 Hierarchical structures
section13 Specify blocks
section14 System tasks and functions
section15 VCD file
section16 Compiler directives
section17 PLI TF and ACC interface mechanism
section18 Using ACC routines
section19 ACC routine defination
section20 Using TF routines
section21 TF routine defination
section22 Using VPI routines
section23 VPI routine definations