telechips\TCC79xx_DataSheet

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【文件名】:09111@52RD_TCC79xx_DataSheet_V0.10-080110.rar
【格　式】:rar
【大　小】:3658K
【简　介】:TCC79xx_DataSheet
本文来自：我爱研发网(52RD.com) 详细出处：http://www.52rd.com/bbs/Post.asp?action=new&boardid=144
【目　录】:Table of Contents
DISCLAIMER....................................................................................................................................................... １
REVISION HISTORY........................................................................................................................................... ３
TABLE OF CONTENTS....................................................................................................................................... ５
TABLE OF FIGURES .......................................................................................................................................... ９
TABLE OF TABLES .........................................................................................................................................１３
1 INTRODUCTION .........................................................................................................................................1-1
1.1 FEATURE........................................................................................................................................................... 1-1
1.2 BLOCK DIAGRAM.................................................................................................................................................. 1-4
1.3 PIN DESCRIPTIONS .............................................................................................................................................. 1-5
2 ADDRESS AND REGISTER MAP...............................................................................................................2-1
2.1 ADDRESS MAP..................................................................................................................................................... 2-1
3 BUS ARCHITECTURE................................................................................................................................3-1
3.1 MAIN BUS ARCHITECTURE................................................................................................................................... 3-1
3.2 VIDEO HARDWARE BUS ARCHITECTURE.............................................................................................................. 3-2
3.3 I/O BUS ARCHITECTURE...................................................................................................................................... 3-3
4 ARM926EJ-S MAIN PROCESSOR .............................................................................................................4-1
4.1 OVERVIEW............................................................................................................................................................ 4-1
4.2 FUNCTIONAL DESCRIPTION ................................................................................................................................. 4-2
4.3 COPROCESSOR CP15......................................................................................................................................... 4-6
5 LCD INTERFACE........................................................................................................................................5-1
5.1 OVERVIEW............................................................................................................................................................ 5-1
5.2 RAW IMAGE SOURCE PROCESSING ..................................................................................................................... 5-3
5.3 DISPLAY INTERFACE............................................................................................................................................. 5-9
5.4 REGISTER DESCRIPTION ................................................................................................................................... 5-18
6 LCD SYSTEM INTERFACE .........................................................................................................................6-1
6.1 OVERVIEW............................................................................................................................................................ 6-1
6.2 OPERATION .......................................................................................................................................................... 6-1
6.3 REGISTER DESCRIPTIONS ................................................................................................................................... 6-4
7 NTSC / PAL ENCODER COMPOSITE OUTPUT ........................................................................................7-1
7.1 OVERVIEWS ......................................................................................................................................................... 7-1
7.2 FEATURES............................................................................................................................................................ 7-1
7.3 SELECTING OPERATION MODE............................................................................................................................ 7-2
7.4 INPUT TIMING ....................................................................................................................................................... 7-2
7.5 VIDEO STANDARD SELECTION............................................................................................................................. 7-5
7.6 BASIC VIDEO ADJUSTMENTS ............................................................................................................................... 7-5
7.7 PROGRAMMABLE BANDWIDTH............................................................................................................................. 7-5
7.8 ANALOG VIDEO OUTPUT CONFIGURATION........................................................................................................... 7-6
7.9 REGISTERS .......................................................................................................................................................... 7-7
7.10 COPY GENERATION MANAGEMENT SYSTEMS.................................................................................................... 7-21
7.11 10-BIT DAC....................................................................................................................................................... 7-22
8 MEMORY TO MEMORY SCALER...............................................................................................................8-1