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【推荐】IC高级数字电路设计工程师 ----------------猎头招聘 (深圳)
我们是一家专业从事IT、IC半导体行业的猎头公司,我们的客户都是500强级行业龙头的外资企业 我们会帮助每一个前去面试的候选人做好正确的面试辅导以获得更高的录用几率,每个想跳槽的或者想做个备胎的朋友都可以联系我,我们会尽我的能力帮助你们找到一份满意的工作!~
(一):
Symwave芯微(www.symwave.com)是于2001年2月由一队顶尖的模拟/混合信号集成电路设计工程师创建的。
公司已经开发了广泛的可应用于串行、物理层、无线接口的基于高速、低功耗CMOS集成电路设计的模拟/混合信号集成电路技术。
IC 高级模拟设计工程师 / IC Senior Analog Design
Job Description:
1. High Speed CMOS ADC/DAC/PLL design experience
2. Analog baseband blocks: Filter Design, VGA and PGA design, etc.:
3. Miscellaneous baseband and mixed signal blocks: bandgaps, regulators, etc.
4. Support design and verification of internally developed memory compilers and custom memories including: SRAM, Register File, ROM, One-Time-Programmable, and CAM.
5. Capable of self-directed work and be focused on practical problem solving and product design.
6. In addition to the technical duties this position will interface with the manufacturing partner to insure that the products are production ready;
7. Interface with the end customer to insure that all technical specifications are understood;
8. Produce and maintain technical documentation pertinent to the project.
Requirements:
1. Master Degree EE, 5+ years experience on Chip Design
2. Familiar with Chip Design Flow
3. Can use HDL like verilog/VHDL
4. Can use EDA tool like (HSPICE/Cadence/Debussy/PrimeTime/Synopsys DC/Debussy)
5. To know SOC Design is plus
6. Having the capability of planning the chip spec and leading the design team is plus
7. Experience with transistor level circuit design and layout;
8. Knowledge of CMOS fabrication methods and digital circuits;
9. Experience with memory design and circuit simulation;
10. Experience with layout parasitic extraction and simulation tools;
11. Experience with Unix shell languages; knowledge of verilog modeling;
12. Familiarity with layout verification tools, design rules, and rule decks.
13. Fluent English listening, speaking, and writing ability
有兴趣的朋友请与我们联系0755-86350190、86350195或发简历到邮箱 michael@chinaeejob.com 我们会及时回复您~ |
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