掌微A3（atlasIII64X）软件开发使用手册，超值哦

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Atlas-III Developer Manual

Table of Contents
1.  Introduction.......................................................................................................... 1
1.1  Overview of Atlas™-III ............................................................................................................1
1.2  Features and Configurations of Atlas™-III Application Processor ..........................................1
1.3  Application Example................................................................................................................3
2.  RISC Subsystem.................................................................................................. 3
2.1  Overview .................................................................................................................................3
2.2  Functional Modules of the RISC Subsystem ..........................................................................4
2.2.1  ARM926EJ Processor ................................................................................................4
2.2.2  Address Mapping........................................................................................................4
2.2.3  Memory Bus Interface.................................................................................................6
2.2.4  I/O Bus Interface.........................................................................................................6
2.3  RISC Subsystem Registers.....................................................................................................7
3.  DSP Subsystem................................................................................................. 12
3.1  Overview of the DSP Subsystem..........................................................................................12
3.2  Functional Modules of the DSP Subsystem..........................................................................13
3.2.1  DSP Memory.............................................................................................................13
3.2.2  DSP Host Interface ...................................................................................................14
3.2.3  DSP IO Interface.......................................................................................................15
3.3  DSP Subsystem Registers....................................................................................................16
4.  System Memory Interface ................................................................................. 22
4.1  Overview of System Memory Interface .................................................................................22
4.2  System Arbiter.......................................................................................................................22
4.2.1  Overview of System Arbiter ......................................................................................22
4.2.2  System Arbiter Registers ..........................................................................................23
4.3  SDRAM Controller.................................................................................................................24
4.3.1  Overview...................................................................................................................24
4.3.2  SDRAM Connection Examples.................................................................................25
4.3.3  SDRAM Controller Registers ....................................................................................26
5.  System Control Modules................................................................................... 29
5.1  Mode Configuration Pins.......................................................................................................29
5.1.1  Overview...................................................................................................................29
5.1.2  Configuration Setup ..................................................................................................30
5.2  Clock and PLL.......................................................................................................................31
5.2.1  Overview...................................................................................................................31
5.2.2  Oscillator ...................................................................................................................32
5.2.3  PLL............................................................................................................................34
5.2.4  Multiplexer and Divider .............................................................................................38
5.2.5  Clock Switching.........................................................................................................41
5.2.6  Real Time Clock Registers .......................................................................................41
5.3  Power Manager .....................................................................................................................43
5.3.1  Overview...................................................................................................................43
5.3.2  Sleep/Wakeup Sequence .........................................................................................43
5.3.3  Power Manager Registers ........................................................................................44
5.4  Interrupt Controller ................................................................................................................55
5.4.1  Overview...................................................................................................................55
5.4.2  Interrupt Controller Registers....................................................................................57
5.5  OS Timer ...............................................................................................................................67
5.5.1  Overview...................................................................................................................67
5.5.2  OS Timer Registers ..................................................................................................67
5.6  Reset Controller ....................................................................................................................71
5.6.1  Overview...................................................................................................................71
5.6.2  Reset Scheme ..........................................................................................................72
5.6.3  Reset Controller Registers........................................................................................73
5.7  Resource Sharing Controller.................................................................................................75
5.7.1  DMA Sharing.............................................................................................................75
5.7.2  Pin Sharing ...............................................................................................................75
5.7.3  Resource Sharing Controller Registers ....................................................................86
5.8  GPIO .....................................................................................................................................87
5.8.1  Overview...................................................................................................................87
5.8.2  GPIO Registers.........................................................................................................90
5.9  PWM....................................................................................................................................101
5.9.1  Overview.................................................................................................................101
5.9.2  PWM Registers.......................................................................................................101
6.  Graphic Display Subsystem........................................................................... 103
6.1  Overview .............................................................................................................................103
6.2  LCD Controller.....................................................................................................................103
6.2.1  Overview.................................................................................................................103
6.2.2  Pin Description........................................................................................................104
6.2.3  Functional Description ............................................................................................107
6.2.4  LCD Controller Registers........................................................................................111
6.3  2D BitBLT Engine................................................................................................................156
6.3.1  Overview.................................................................................................................156
6.3.2  Functional Modules.................................................................................................157
6.3.3  2D/BitBLT Engine Registers ...................................................................................159
7.  PCI Subsystem ................................................................................................ 169
7.1  Overview .............................................................................................................................169
7.2  System to PCI Bridge..........................................................................................................169
7.2.1  PCI Bridge RISC IO Registers................................................................................170
7.2.2  PCI Bridge DSP IO Registers .................................................................................173
7.3  ROM/SRAM Controller ........................................................................................................175
7.3.1  Overview.................................................................................................................175
7.3.2  Pin Description........................................................................................................175
7.3.3  Address Mapping....................................................................................................176
7.3.4  ROM/SRAM Controller Registers ...........................................................................177
7.4  SDIO Host Controller ..........................................................................................................183
7.4.1  Overview.................................................................................................................183
7.4.2  Pin Description........................................................................................................184
7.4.3  Functional Modules.................................................................................................185
7.4.4  SDIO Host Controller Registers..............................................................................186
7.5  USB-OTG Interface.............................................................................................................210
7.5.1  Overview.................................................................................................................210
7.5.2  Pin Description........................................................................................................211
7.5.3  Functional Description ............................................................................................211
7.5.4  USB-OTG Interface Registers ................................................................................213
7.6  IDE Interface .......................................................................................................................244
7.6.1  Overview.................................................................................................................244
7.6.2  Pin Description........................................................................................................245
7.6.3  IDE Interface Registers...........................................................................................245
7.7  PCMCIA/CF Interface .........................................................................................................253
7.7.1  Overview.................................................................................................................253
7.7.2  PCMCIA Signal Descriptions ..................................................................................254
7.7.3  CF Card Connection Example................................................................................255
7.7.4  PCMCIA Memory Mapping .....................................................................................256
7.7.5  PCMCIA Interface Registers...................................................................................257
7.8  Data Transfer Engines ........................................................................................................282
7.8.1  Overview.................................................................................................................282
7.8.2  PCI_COPY Engine .................................................................................................282
7.8.3  IPOLATE Engine.....................................................................................................287
7.8.4  YUV_CHG Engine ..................................................................................................292
7.8.5  YUV_RGB Engine ..................................................................................................298
8.  Peripheral Subsystem..................................................................................... 304
8.1  Overview .............................................................................................................................304
8.2  I/O Bridge ............................................................................................................................304
8.2.1  Overview.................................................................................................................304
8.2.2  I/O Bridge Registers ...............................................................................................305
8.3  DMA Controller....................................................................................................................307
8.3.1  Overview.................................................................................................................307
8.3.2  Functional Description ............................................................................................309
8.3.3  Basic DMA Operations ...........................................................................................312
8.3.4  DMA Controller Registers .......................................................................................315
8.4  NAND Flash Interface .........................................................................................................320
8.4.1  Overview.................................................................................................................320
8.4.2  Pin Description........................................................................................................321
8.4.3  NAND Flash Interface Registers.............................................................................322
8.5  Video Input Port...................................................................................................................328
8.5.1  Overview.................................................................................................................328
8.5.2  Functional Description ............................................................................................329
8.5.3  Video Input Port Registers......................................................................................338
8.6  Audio CODEC.....................................................................................................................346
8.6.1  Overview.................................................................................................................346
8.6.2  Signal Description...................................................................................................347
8.6.3  Functional Modules.................................................................................................347
8.6.4  Audio CODEC Registers ........................................................................................355
8.7  UART...................................................................................................................................370
8.7.1  Overview.................................................................................................................370
8.7.2  Pin Description........................................................................................................371
8.7.3  Functional Description ............................................................................................372
8.7.4  UART Registers......................................................................................................372
。。

cjaiscja

[em01]
【文件名】:081122@52RD_Atlas-III Developer Manual.part1.rar
【格　式】:rar
【大　小】:1457K
【简　介】:
【目　录】:


掌微A3（atlasIII64X）软件开发使用手册，超值哦（第一部分）

cjaiscja

【文件名】:081122@52RD_Atlas-III Developer Manual.part2.rar
【格　式】:rar
【大　小】:1457K
【简　介】:
【目　录】:

掌微A3（atlasIII64X）软件开发使用手册，超值哦（第二部分）

cjaiscja

【文件名】:081122@52RD_Atlas-III Developer Manual.part3.rar
【格　式】:rar
【大　小】:1457K
【简　介】:
【目　录】:

掌微A3（atlasIII64X）软件开发使用手册，超值哦（第三部分）

cjaiscja

版主，刚刚发第四部分的时候（有标价格），但是没有加标题，报出了错误，所有没有发表成功。
重新再上传的时候，系统“不要重复上传”，所有没有办法上传第四部分了，看看有没有办法？

cjaiscja

我重新压缩一下，一共三部分，名字稍微改了一下
目录还是主贴中的，请大家仔细看看，没有需求的就不要买了，现在不景气！
这个是第一部分！
【文件名】:081122@52RD_Atlas-III64X Developer Manual.part1.rar
【格　式】:rar
【大　小】:1457K
【简　介】:
【目　录】:

cjaiscja

这个是第二部分！
【文件名】:081122@52RD_Atlas-III64X Developer Manual.part2.rar
【格　式】:rar
【大　小】:1457K
【简　介】:
【目　录】:

cjaiscja

这个是第三部分，完！
【文件名】:081122@52RD_Atlas-III64X Developer Manual.part3.rar
【格　式】:rar
【大　小】:1448K
【简　介】:
【目　录】:

junus

eeee, hhhhaaaa

cjaiscja

意料之外啊，居然没有人顶！

usami

我顶。。。

tzp99

提供掌微AT642和WOLFSONclass-D  WM9715 音频CODEC,海格科技 Tom mobile:138288 16086 mail:tan@hi-gauge.com 可提供技术支持及样片

brookwang

我先核实下先，一个文件不能一次传上来吗？

zengerxu

学习中。感谢了

steak_100

我司稳定提供SiRF atlas Ⅲ/Ⅳ,RF IC,价格从优，欢迎咨询！ 15989514351 杨生

balu_dark

[em05][em05][em05][em05][em05][em01]

zhiyliu8

看不到