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大家好,首先感谢您关注这个贴子,我是上海kt人才的,我叫doris,余小岚我们公司是中国最大最专业的IC/电子人才咨询公司之一,多年来专注于IC与电子行业中高级人才服务,客户主要为欧美著名半导体公司(如TI、ADI、Agere、Atheros等)和美资集成电路设计新公司共20多家,主要寻找IC设计、芯片制造、IC市场与销售、IC应用(硬件与底层软件开发)等人才
现在受上海顶级半导体公司委托寻找FPGA人才,具体介绍如下,有意者可将简历发送到我邮箱,如目前不考虑,也有劳您帮忙推荐些朋友,或将您的简历在我们这边备份一份,有合适的机会时,可即使给您提供!
联系方式:联系电话:021-61023600-28
手机:13524654976 Email:doris-yu@kthr.com msn:lan_yx@hotmail.com
欢迎大家与我联系交朋友,呵呵
1.Senior ASIC Designer:
* 3years+ ASIC design experience
* proficiency in RTL design
* skilled in SoC design
* experience in chip top level design a plus
* experience in FPGA verification a plus
2.ASIC verification engineer
Requirement:
1.MSEE ASIC/FPGA design/verification with above 2 year work experience, or EE bachelor ASIC/FPGA design/verification with above 2 years work experience;
2.Familiar with EDA tool;
3.Familiar with FPGA development environment;
4.Familiar with VHDL / Verilog language;
5.Familiar using programming language C++ is preferred;(optional)
6.Excellent analysis and debugging skills.
7.Using scripting languages;(e.g. TCL, shell)
Responsibility:
1.Make a scheme of FPGA prototype verification;
2.Understanding Application System;
3.Chip system understanding;
4.Module algorithm understanding;
5.Verification plan;
6.Top verification platform design;
7.System/module verification;
8.Report issues of development |
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