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[FPGA资料] ALTERA的MAX3000A资料

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发表于 2008-3-16 12:39:50 | 显示全部楼层 |阅读模式
【文件名】:08316@52RD_EPM3064A_www.ic37.com.pdf
【格 式】:pdf
【大 小】:665K
【简 介】:一些关于M3000A系列的资料,希望能给各位一些小小帮助。。。。
【目 录】:Features... ■ High–performance, low–cost CMOS EEPROM–based programmable
logic devices (PLDs) built on a MAX® architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built–in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with
advanced pin-locking capability
– ISP circuitry compliant with IEEE Std. 1532
■ Built–in boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1-1990
■ Enhanced ISP features:


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