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资料索取及样片申请联系:
Steven(陈先生)
MOB:13823576010
MSN:zhongxinchen@126.com
E-MAIL:steven.chen@kada.com.cn
Fast Ethernet switch with Processor
Interface
DM9013E (128-pin/LQFP, MP Now)
● With 3 Ports, 10/100Mbps Switch Controller
● With two 10/100Mbps DSP PHY, one MII,
● Built in 32-bit Processor Interface
● Support 802.1P, 802.1Q VLAN, QoS.
● Support TCP/UDP/IPv4 checksum offload
● Support HP Auto-MDIX
● 1.8V internal core, 3.3V I/O with 5V tolerant
DM9003E (64-pin/LQFP, MP Now)
● With 2 Ports, 10/100Mbps Switch Controller
● With two 10/100Mbps DSP PHY
● Built in 16-bit Processor Interface
● Support 802.1P, 802.1Q VLAN, QoS.
● Support TCP/UDP/IPv4 checksum offload
● Support HP Auto-MDIX
● 1.8V internal core, 3.3V I/O with 5V tolerant
DM9103E (128-pin/LQFP, MP Now)
● With 3 Ports, 10/100Mbps Switch Controller
● With two 10/100Mbps DSP PHY, one MII,
● PCI Interface
● Support 802.1P, 802.1Q VLAN, QoS.
● Support TCP/UDP/IPv4 checksum offload
● Support HP Auto-MDIX
● 1.8V internal core, 3.3V I/O with 5V tolerant
Ethernet Local-Bus Single Chip
DM9000AE (48-pin / LQFP,0 .25um )
● 10/100Mbs w/Auto-MDIX
● 3.3V with 5V tolerant I/O, 6 GPIO Pins
● Local-Bus / uP interface (byte/word), 4K Dword SRAM
● Support back pressure for duplex mode fl0 ow control
● Support TCP/IP checksum offloadz
● Supports Early Tx
DM9000E (100-pin / LQFP, .35um MP Now)
● 10/100Mbs Local-Bus Interface for embedded applications, 3.3V with 5V tolerant I/O, 4 GPIO Pins
● Local-Bus / uP interface (byte/word/Dword), 4K Dword SRAM, MII/reverse MII interface
● Support back pressure for duplex mode flow control
PCI Fast Ethernet Single Chip MAC/PHY
DM9102D (128-pin / QFP & LQFP,MP Now)
● 10/100Mbs 2.5/3.3V with 5V tolerant I/O, 0.25um CMOS process
● Supports Auto-MDIX, external MII interface, Wake-On-LAN & QoS
● Comply with PCI specification 2.2, IEEE 802.3u 100Base-TX, 802.3 10Base-T, ACPI and Bus Power Management
DM9010AE (100-pin / LQFP, 0.25um )
● 10/100Mbs w/Auto-MDIX
● 3.3V with 5V tolerant I/O, up to 23 GPIO pins
● Local-Bus / uP interface (byte/word/Dword), 4K Dword SRAM, MII/reverse MII interface
● Support back pressure for duplex mode flow control
● Support TCP/IP checksum offload
● Supports Early Tx
DM9008AE (48-pin/LQFP, MP Now)
● 10Mbps w/HP Auto-MDIX
● Local-Bus / uP interface (byte/word)
● Support TCP/IP checksum offload & Early Transmit
● Built in 3.3V to 2.5V Regulator
● 3.3V with 5V tolerant I/O, 6 GPIO Pins
Ethernet Switch / Hub/Media Controller
DM8606AF (128-pin QFP, MP Now)
● 1.8V/3.3V with 3.3V tolerant I/O, 12Kx64 SRAM
● Support 5 Ports 10/100Mb Auto-MDIX switch ports with TX/FX interfaces and one MII/GPSI port
● Support 2048 MAC address table
● For multi-port bundle sale with DM9000E Series
DM8203E (64-pin/LQFP, MP Now)
● 1.8V internal core, 3.3V I/O with 5V tolerant
● Support 2 Ports 10/100Mb HP Auto-MDIX Switch ports with TX/FX interfaces and one MII port
● Support Bandwidth control & four queue for QoS
Fast Ethernet Single PHY ceiver
DM9161AE (48-pin / LQFP,MP Now)
● 10/100Mbs 3.3V with 5V tolerant I/O, 0.25um CMOS process
● Support MII/RMII (Reduced MII)/GPSI (7-Wired) interfaces
● Support Auto-MDIX
Modem / MFP SoC Chipset
DM562AP (w/DM6588A:128-pin/QFP, w/DM6580:
48-pin/LQFP, MP Now)
● 2.5V/3.3V with 5V tolerant I/O.
● Support MFP G3 33.6K color Fax engine with T.31
command
● Support synchronous mode, POS and CID
DM562PM (H/W based Module-Kit, MP Now)
● Support Module-Kit to interface ISA/RS232//PCI/IR/ for
Embedded system.
DM6288F (ES Q1/07)
● 2.5V/3.3V with 5V tolerant I/O
● Cost-effective system solution for embedded Fax
product application, with MFP Fax protocol driver.
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