DIGRF Specification

heekee

【文件名】:0772@52RD_DigRF Standard v112.rar
【格　式】:rar
【大　小】:564K
【简　介】:
【目　录】:



Transceiver接口的趋势
1 INTRODUCTION 2
1.1 Background 2
1.2 Purpose 2
1.3 Scope 3
1.4 References 3
2 WORKING GROUP AND TERMS 4
2.1 Working Group 4
2.2 Terms of Use of this Specification 4
2.3 Disclaimer 4
2.4 Source and Validity 5
2.5 Corrections and Improvements 5
3 INTERFACE OVERVIEW 6
3.1 Description 6
3.2 Rx/Tx Data Interface 7
3.3 Control Interface 7
3.4 Master Clock Interface 7
3.5 Interface Configurability 7
4 DETAILED SPECIFICATION 9
4.1 General Definitions 9
4.2 Rx/Tx Data Interface 9
4.2.1 RxTxData Signal 9
4.2.2 RxTxEn Signal 10
4.2.3 Tx Stream Mode 12
4.2.4 Tx Block Mode 14
4.2.5 Rx Mode 154.2.6 Reference Clock 18
4.3 Control Interface 18
4.3.1 CtrlData Signal 18
4.3.2 CtrlEn Signal 20
4.3.3 CtrlClk Signal 21
4.3.4 Strobe Signal 23
4.4 Master Clock Interface 24
4.4.1 SysClk Signal 24
4.4.2 SysClkEn Signal 25
5 IMPLEMENTATION ASPECTS 26
5.1 Logic Levels and Thresholds 26
5.2 Digital Filter Bypass 27
5.3 Digital Filter Implementation 27
5.4 Tx Buffer Mode 27
6 FUTURE DEVELOPMENT 28
6.1 2.5G 28
6.2 3G 28

tonyhung

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baobin

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