Frequency synthesizer

ohyoung

A spur-reduction technique is presented to achieve
lowreference spurs for a 5-GHz frequency synthesizer.Adual-path
control scheme incorporated with a pair of the proposed smoothed
varactors reduces the gain of voltage-controlled oscillator to
less than 15 MHz/V, attenuates the spurious tones, and shortens
the simulated settling time by 56%. In, addition, a digital frequency-
calibration circuit is used to enlarge the tuning range to
overcome process variations. A 5-GHz frequency synthesizer has
been fabricated for verification in a 0.18- m CMOS process. It
exhibits phase noise of 79 and 113 dBc/Hz at 10-kHz and
1-MHz offset, respectively. The reference spur level of 74 dBc
is achieved by using a second-order loop filter. The overall tuning
range is 16.3% and power consumption is 36 mW from a 1.8-V
supply. The total switching time including digital frequency calibration
takes no more than 110 s.
【文件名】:07430@52RD_01610851.pdf
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bigdog

下来看看先