Nvidia MCP55P Desige guide

conhey

Nvidia MCP55P Desige guide
【文件名】:07219@52RD_Nvidia MCP55P Desige guide.pdf
【格　式】:pdf
【大　小】:1287K
【简　介】:
【目　录】:

mwo1974

Design Guide
MCP55P/MCP55S/MCP55 Ultra
Media and Communications  
Processor

NVIDIA CONFIDENTIAL  
Prepared and Provided Under NDA

Table of Contents
Chapter 1. Introduction .............................................................................................................1
Features and Functions................................................................................................................1
Block Diagram............................................................................................................................3
PCI Configuration Space ..............................................................................................................4
Chapter 2. Motherboard Design Recommendations ...................................................................7
Motherboard Stack-Up.................................................................................................................7
Four-Layer Stack-Up................................................................................................................7
Via Placement ........................................................................................................................9
Antipad Placement ..................................................................................................................9
Component Placement...............................................................................................................11
Power Regulation and Decoupling ...............................................................................................12
Decoupling...........................................................................................................................12
Bulk Decoupling....................................................................................................................12
Power Description.................................................................................................................13
PLL Description.....................................................................................................................15
Routing Guidelines ................................................................................................................16
Signal Type Codes.................................................................................................................18
Chapter 3. Interface Routing ................................................................................................... 20
HyperTransport Link to AMD.......................................................................................................21
PCI Express Signal ....................................................................................................................28
PCI Express Interface Routing.................................................................................................29
Integrated Serial ATA (SATA) .....................................................................................................33
NVIDIA MAC ............................................................................................................................38
Media Independent Interface (MII)..........................................................................................38
Reduced Gigabit Media Independent Interface (RGMII) ..............................................................41
IDE.........................................................................................................................................45
USB ........................................................................................................................................48
LPC.........................................................................................................................................49
SMBus.....................................................................................................................................52
Design Guidelines .................................................................................................................52

gdzhdh

[em15][em15][em15]