s3c2510开发板原理图和Datasheet

hndeng06

【文件名】:07125@52RD_S3C2510.pdf
【格　式】:pdf
【大　小】:423K
【简　介】:三星s3c2510的数据手册
【目　录】:OVERVIEW
Samsung's S3C2510A 16/32-bit RISC micro-controller is a cost-effective, high-performance micro-controller
solution for Ethernet-based systems, for example, SOHO router, internet gateway, WLAN AP, etc.
To efficiently support those network applications, S3C2510A provides the followings: 16/32-bit ARM940T RISC
embedded with 4K-byte I-cache and 4K-byte D-cache, memory controller with 24-bit external address pins, one
external bus master with bus request/acknowledge pins, two 10/100 Mbps Ethernet controllers, PCI & PC Card
host/agent controller,  AAL5 SAR and UTOPIA L1/L2, two port full/low speed USB host with root hub, one port
USB function device with transceiver, six general-purpose DMAs, two high-speed UARTs, one console UART,
DES and 3DES for IP security, IIC serial interface, interrupt controller, six 32-bit programmable timers, 30-bit
watchdog timer, 64 programmable I/O ports, and four PLLs for clock generation.
The S3C2510A is developed using an ARM940T core, 0.18um CMOS standard cells and a memory compiler. Its
powerful, elegant and fully static design is suitable for various network applications. Also S3C2510A adopts a new
bus architecture, AMBA (Advanced Microcontroller Bus Architecture).
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hndeng06

【文件名】:07125@52RD_S3C2510.pdf
【格　式】:pdf
【大　小】:423K
【简　介】:三星s3c2510的数据手册
【目　录】:OVERVIEW
Samsung's S3C2510A 16/32-bit RISC micro-controller is a cost-effective, high-performance micro-controller
solution for Ethernet-based systems, for example, SOHO router, internet gateway, WLAN AP, etc.
To efficiently support those network applications, S3C2510A provides the followings: 16/32-bit ARM940T RISC
embedded with 4K-byte I-cache and 4K-byte D-cache, memory controller with 24-bit external address pins, one
external bus master with bus request/acknowledge pins, two 10/100 Mbps Ethernet controllers, PCI & PC Card
host/agent controller,  AAL5 SAR and UTOPIA L1/L2, two port full/low speed USB host with root hub, one port
USB function device with transceiver, six general-purpose DMAs, two high-speed UARTs, one console UART,
DES and 3DES for IP security, IIC serial interface, interrupt controller, six 32-bit programmable timers, 30-bit
watchdog timer, 64 programmable I/O ports, and four PLLs for clock generation.
The S3C2510A is developed using an ARM940T core, 0.18um CMOS standard cells and a memory compiler. Its
powerful, elegant and fully static design is suitable for various network applications. Also S3C2510A adopts a new
bus architecture, AMBA (Advanced Microcontroller Bus Architecture).
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