新手的低级问题?望哪个哥哥姐姐指点新手如道!

moon_lai

我仿真了一个状态机.为什么输出不是在上升沿立即触发呢?难道逻辑仿真也有滞后吗?代码如下:
Library IEEE ;
use IEEE.std_logic_1164.all ;

ENTITY statmach IS
PORT(
  clk  : IN BIT;
  input : IN BIT;
  reset : IN BIT;
  output : OUT BIT);
END statmach;
ARCHITECTURE a OF statmach IS
TYPE STATE_TYPE IS (s0, s1);
SIGNAL state : STATE_TYPE;
BEGIN
PROCESS (clk)
BEGIN
  IF reset = '1' THEN
   state <= s0;
  ELSIF (clk = '1' AND  clk'EVENT) THEN
   CASE state IS
    WHEN s0=>
     state <= s1;
    WHEN s1=>
     IF input = '1' THEN
      state <= s0;
     ELSE
      state <= s1;
     END IF;
   END CASE;
  END IF;
END PROCESS;

output <= '1' WHEN state = s1 ELSE '0';
END a;

波形图如下

[upload=jpg]UploadFile/2007-1/0716@52RD_wave.jpg[/upload]

moon_lai

我用的是quartus 6.0仿真的!~~

moon_lai

[em10]

moon_lai

这个问题。我已经发现是由于信号附值有延迟的原因..