Power PC 处理器 405EP

superwxj

Technical Specifications
405 processor core with 16K instruction cache/16K data cache
64-bit CoreConnect™ bus architecture
Up to 333MHz performance
Up to 506DMIPs
Two on-chip Ethernet MACs to enhance integration and simplify
board design
32-bit PCI controller, 66MHz (PCI v2.2 compliant)
On-chip 4KB SRAM with single-cycle access for faster processing in
data-intensive applications, such as routers and switches
SDRAM controller
DMA controller and external peripheral controller
On-chip Peripherals including:
Two serial ports
Master and slave IIC controller
Up to 32 general purpose I/Os
0.72W estimated typical power dissipation at 266MHz
Target Applications
High-density designs where connectivity is at a premium, including:
Wireless LAN access points
Edge routers
Broadband modems
很强的一款处理器，被Cisco大量使用哦。

【文件名】:061230@52RD_PPC405EP_DS2003__v1_02.pdf
【格　式】:pdf
【大　小】:959K
【简　介】:
【目　录】: