Outline:
1. Design Approach
2. Amplifier Schematic
3. Biasing Network Schematic
4. Performance Summary
5. Design Process and Equations
6. Simulation Plots:
a. Differential AC Loop Frequency Response
b. Common-Mode AC Loop Frequency Response
c. Open Loop Gain vs. Differential Output Voltage
d. Positive Settling
e. Negative Settling
f. Total Integrated Output Voltage Noise
7. Comments and Conclusion
8. Appendix
a. Circuit Netlist
b. Non-dominant Pole Optimization
c. Doublet Analysis
【文件名】:061226@52RD_berny.pdf
【格 式】:pdf
【大 小】:311K
【简 介】:
【目 录】: