Direct digital synthesizer

matlix

Table of Contents
PREFACE .......................................................................II
ABSTRACT ......................................................................III
TABLE OF CONTENTS .............................................................IV
LIST OF ABBREVIATIONS .........................................................X
LIST OF SYMBOLS................................................................XIII
1. INTRODUCTION ...............................................................1
1.1 Motivation ................................................................1
1.2 Overview of Work...........................................................2
1.3 Contributions to Advances in (Science and) Technology .....................4
1.4 Related Publications ......................................................5
2. DIRECT DIGITAL SYNTHESIZER .................................................8
2.1 Conventional Direct Digital Synthesizer....................................8
2.2 Pulse Output DDS...........................................................9
2.3 DDS Architecture for Modulation Capability.................................11
2.4 QAM Modulator..............................................................12
2.5 Digital Chirp DDS..........................................................14
2.6 DDS Power Consumption and Spurious Level...................................15
2.7 State of the Art in DDS ICs................................................17
3. INDIRECT DIGITAL SYNTHESIZER................................................18
3.1 Direct-Form Oscillator ....................................................18
3.2 Coupled-Form Complex Oscillator............................................20
4. CORDIC ALGORITHM............................................................23
4.1 Introduction ..............................................................23
4.2 Scaling of In and Qn.......................................................25
4.3 Quantization Errors in CORDIC Algorithm....................................26
4.3.1 Approximation Error .....................................................26
4.3.2 Rounding Error of Inverse Tangents.......................................28
4.3.3 Rounding Error of In and Qn .............................................28
4.3.4 Overall Error............................................................29
4.3.5 Signal-to-Noise Ratio ...................................................30
4.4 Redundant Implementations of CORDIC Rotator................................31
5. SOURCES OF NOISE AND SPURS IN DDS...........................................33
5.1 Phase Truncation Related Spurious Effects .................................33
5.2 Finite Precision of Sine Samples Stored in ROM.............................37
5.3 Distribution of Spurs .....................................................38
5.4 D/A-Converter Errors ......................................................42
5.5 Phase Noise of DDS Output .................................................45
5.6 Post-filter Errors.........................................................47
6. BLOCKS OF DIRECT DIGITAL SYNTHESIZER........................................48
6.1 Phase Accumulator..........................................................48
6.2 Phase to Amplitude Converter ..............................................49
6.2.1 Exploitation of Sine Function Symmetry...................................50
6.2.2 Compression of Quarter-Wave Sine Function ...............................52
6.2.2.1 Sine-Phase Difference Algorithm........................................52
6.2.2.2 Modified Sunderland Architecture.......................................53
6.2.2.3 Nicholas’ Architecture................................................54
6.2.2.4 Taylor Series Approximation............................................56
6.2.2.5 Using CORDIC Algorithm as a Quarter Sine Wave Generator................58
6.2.3 Simulation...............................................................59
6.2.4 Summary of Memory Compression and Algorithmic Techniques ................60
6.3 Filter.....................................................................61
7. SPUR REDUCTION TECHNIQUES IN SINE OUTPUT DIRECT DIGITAL SYNTHESIZER.........63
7.1 Nicholas’ Modified Accumulator ...........................................63
7.2 Non-subtractive Dither.....................................................65
7.2.1 Non-subtractive Phase Dither ............................................66
7.2.2 First-Order Analysis ....................................................66
7.2.3 Second-Order: Residual Spurs.............................................69
7.2.4 Non-subtractive Amplitude Dither ........................................71
7.3 Subtractive Dither ........................................................72
7.3.1 High-Pass Filtered Phase Dither .........................................73
7.3.2 High-Pass Filtered Amplitude Dither .....................................73
7.4 Tunable Error Feedback in DDS..............................................74
7.4.1 Tunable Phase Error Feedback in DDS .....................................75
7.4.2 Tunable Amplitude Error Feedback in DDS..................................76
7.5 Summary ...................................................................78
8. UP-CONVERSION...............................................................79
8.1 DDS/PLL Hybrid I ..........................................................79
8.2 DDS/PLL Hybrid II..........................................................80
8.3 DDS/Mixer Hybrid ..........................................................84
8.4 DDS Quadrature Modulator ..................................................85
9. DIRECT DIGITAL SYNTHESIZER WITH AN ON-CHIP D/A-CONVERTER....................87
9.1 Introduction ..............................................................87
9.2 Applications and Design Requirements ......................................87
9.3 Sine Memory Compression....................................................88
9.3.1 Exploitation of Sine Function Symmetry...................................89
9.3.2 Compression of Quarter-wave Sine Function................................89
9.4 Phase Accumulator..........................................................90
9.5 Circuit Design Issues .....................................................91
9.5.1 ROM Block Design ........................................................91
9.5.2 D/A-Converter ...........................................................92
9.5.3 Summary of the DDS Block Design..........................................95
9.5.4 Layout Considerations ...................................................95
9.6 Experimental Results.......................................................96
9.7 Summary ...................................................................99
10. CMOS QUADRATURE IF FREQUENCY SYNTHESIZER/MODULATOR.........................101
10.1 Introduction .............................................................101
10.2 Design Requirements.......................................................102
10.3 Quadrature IF Direct Digital Synthesizer .................................103
10.3.1 Direct Digital Synthesizer with Quadrature Outputs .....................103
10.3.2 Modulation Capabilities.................................................104
10.3.3 Phase Offset ...........................................................104
10.4 Circuit Design ...........................................................105
10.4.1 Phase Accumulator ......................................................105
10.4.2 ROM Block...............................................................106
10.4.3 D/A Converter ..........................................................107
10.4.4 Lowpass Filter .........................................................108
10.4.5 Layout .................................................................110
10.5 Experimental Results......................................................111
10.6 Summary ..................................................................113
11. MULTI-CARRIER QAM MODULATOR ...............................................115
11.1 Introduction .............................................................115
11.2 Architecture Description..................................................116
11.2.1 Multi-Carrier QAM Modulator.............................................116
11.2.2 CORDIC-Based QAM Modulator .............................................117
11.2.3 Phase Accumulator ......................................................120
11.2.4 Inverse Sinx/x Filter...................................................120
11.3 Filter Architecture and Design ...........................................121
11.3.1 Filter Architecture.....................................................121
11.3.2 Root Raised Cosine Filter Coefficient Design............................122
11.3.3 Half-Band Filter Coefficient Design.....................................125
11.4 Multi-Carrier QAM Signal Characteristics .................................126
11.5 Simulation Results .......................................................127
11.6 Implementation ...........................................................130
11.7 D/A Converter.............................................................130
11.8 Layout....................................................................132
11.9 Measurement Results ......................................................132
11.10 Summary .................................................................134
12. SINGLE CARRIER QAM MODULATOR...............................................135
12.1 Conventional QAM Modulator ...............................................135
12.2 CORDIC Based QAM Modulator................................................135
12.3 Phase Accumulator.........................................................136
12.4 Filter Architectures and Design...........................................136
12.4.1 Filter Architectures ...................................................136
12.4.2 Filter Coefficient Design...............................................136
12.5 D/A-Converter ............................................................137
12.6 Implementation with the PLDs..............................................138
12.7 Simulation Results .......................................................140
12.8 Measurement Results ......................................................140
12.9 Summary ..................................................................141
13. MULTI-CARRIER GMSK MODULATOR...............................................142
13.1 Introduction .............................................................142
13.2 Interface.................................................................142
13.3 GMSK Modulator............................................................143
13.4 Ramp Generator and Output Power Level Controller .........................147
13.4.1 Conventional Solutions..................................................147
13.4.2 Novel Ramp Generator and Output Power Controller .......................148
13.4.3 Finite Word length Effects in Ramp Generator and Output Power Controller153
13.5 Design Example............................................................155
13.6 Multi-Carrier GSM Signal Characteristics..................................155
13.7 Simulation Results .......................................................158
13.8 Implementation ...........................................................159
13.9 D/A Converter.............................................................159
13.10 Layout ..................................................................160
13.11 Measurement Results .....................................................162
13.12 Summary .................................................................164
14. CONCLUSIONS................................................................167
REFERENCES ....................................................................169
Appendix A : Fourier Transform of DDS Output ..................................189
Appendix B : Derivation Output Current of Bipolar Current Switch with Base Current
Compensation...................................................................190
Appendix C : Digital Phase Pre-distortion of Quadrature Modulator Phase Errors.191
Appendix D : Different Recently Reported DDS ICs ..............................193



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matlix

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matlix

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matlix

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guxin001

好东东，要了解dds者，强烈推荐你们看看！