SOC系统总线基础

rder

Processor bus design and implementation are critical elements of SoC designs. Busses play a central role, both internal to the chip, where a bus might connect the CPU to an SoC’s peripheral controllers, and external to the chip, where busses connect a device to a variety of external peripherals. This paper, which complements the PMC-Sierra webinar, “Processor Bus Fundamentals”, discusses the importance of processor bus standards. It introduces key characteristics of processor busses, describes their evolution, and provides a review of three important public bus standards PCI Express, HyperTransport, and RapidIO as well as an overview of internal bus types. It also discusses design and verification issues critical for SoC design.
【文件名】:061114@52RD_soc系统总线基础.rar
【格　式】:rar
【大　小】:197K
【简　介】:
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woyao

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maple79317

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woyao

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chairman704

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michael981

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