我是初学者 尝试用VHDL语言生成一个8bit 和一个32bit的buffer 代码如下
type buf_32_t is array(0 to 3) of std_logic_vector(7 downto 0);
signal buf_32 : buf_32_t -- buffer
signal buf_8 : std_logic_vector(7 downto 0);
但综合的时候就是通不过 如下
ERROR:HDLParsers:164 - E:/Xilinx/bin/AES/key.vhd Line 34. parse error, unexpected SIGNAL, expecting AFFECT or SEMICOLON
ERROR:HDLParsers:3312 - E:/Xilinx/bin/AES/key.vhd Line 70. Undefined symbol 'buf_8'.
ERROR:HDLParsers:3312 - E:/Xilinx/bin/AES/key.vhd Line 71. Undefined symbol 'buf_32'.
ERROR:HDLParsers:1209 - E:/Xilinx/bin/AES/key.vhd Line 75. buf_8: Undefined symbol (last report in this block)
ERROR:HDLParsers:1209 - E:/Xilinx/bin/AES/key.vhd Line 76. buf_32: Undefined symbol (last report in this block)
请问各位老大这是怎么回事??