The PCB level ESD immunity study by using 3 Dimension ESD

bigtie

不知道大家觉得有没有用，你先看看吧。共6页
Abstract
The use of high-speed logic makes modern electronic systems
highly susceptible to electrostatic discharge (ESD). Because of
their wider bandwidth, faster digital devices are more susceptible
to high frequency ESD transient fields. In the analysis of
ESD problems, an exact knowledge of the affected PINs and
Nets is essential for an optimal solution. In this paper, a three
dimensional ESD scanning system which has been developed to
record the ESD susceptibility map for printed circuit board is
presented and the mechanisms that the ESD event couples into
the digital devices is studied.

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Rainkangmin

too expensive[em13]

Raining

太贵了啊

ADS2005A

不就是一个IEEE的paper嘛，至于到打劫的地步吗？