【上海莱迪思半导体招聘】 资深模拟芯片设计 16K-32K 上海

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上海莱迪思半导体有限公司

资深模拟芯片设计

16K-32K 上海  5年以上   硕士及以上   全职

职位诱惑: 优厚福利待遇及良好的企业文化
发布时间: 2016-02-04
职位描述
Responsibilities

    To develop novel analog/mixed signal circuit techniques and architecture to facilitate high-bandwidth (multi-gigabit per second) serial communication network and links. Immediately focus on 5Gbps~10+Gbps Serializer/Deserializer (SerDes) transceiver chips and technology for HDMI, Display-port, USB, PCIe and other serial link applications.
    Focus on Serdes analog/mixed signal circuit design and simulation. Circuits include PLLs, Clock-data recovery (CDR), Equalizer, Transmitter/Receiver etc.
    Guide layout engineers to accomplish layout of block level and analog core level.
    Work with characterization engineer to fully characterize circuit blocks and IC chips.

Qualifications
    MS or PhD degree in Electrical Engineering with an emphasis in analog or mixed-signal design.
    Solid knowledge in circuit theory and semiconductor device physics.
    Knowledge of signal processing and communication theories is a plus.
    8+ years industrial experience.
    Cadidate with one or more following areas are preferred:  PLL, Serdes, ADC/DAC, filters etc.
    Familiar with EDA design/simulation tools especially Cadence Virtuoso/ADE environment.
    Good communication skills in both Chinese and English. Willingness to work with teams in US and worldwide.
    Highly organized, with attention to details, time management, and deadlines. Good team player is expected.
    Ability to multi-task and set priorities in a fast-paced environment.


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