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【文件名】:06525@52RD_Mismatch Modelling for Large Area MOS Devices.rar
【格 式】:rar
【大 小】:75K
【简 介】:Abstract | Investigations were made on mismatch effects in a bit cell for an analog-to-digital converter, fabricated in a 1.6/45nm CMOS pro-
cess. The cell was designed to yield in a given bit resolution, considering
the mismatch effects described by the well known law of area. It could be
shown that large area MOS transistors are subject to a matching accu-
racy saturation effect, which makes it necessary to extend the mismatch
model. An enhanced mismatch model is presented, which allows statis-
tical simulation and prediction for both large area effects and for long
distance effects between devices. The model was successfully verified by
measurements and implemented into the statistical simulator GAME1.
【目 录】:
1 Introduction
2 Analog-to-Digital Converter with Bit Cells
3 Enhanced Mismatch Modelling
4 Results
5 Conclusion
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