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【文件名】:06522@52RD_se_tutor.rar
【格 式】:rar
【大 小】:2026K
【简 介】:ModelSim comes with Verilog and VHDL versions of the designs used in these lessons. This allows you to do the tutorial regardless of which license type you have. Though we have tried to minimize the differences between the Verilog and VHDL versions, we could not do so in all cases. In cases where the designs differ (e.g., line numbers or syntax), you will find languagespecific instructions. Follow the instructions that are appropriate for the language that you are using.
【目 录】:
Lesson 1 - ModelSim conceptual overview
Lesson 2 - Basic simulation
Lesson 3 - ModelSim projects
Lesson 4 - Working with multiple libraries
Lesson 5 - Simulating designs with SystemC
Lesson 6 - Viewing simulations in the Wave window
Lesson 7 - Creating stimulus with Waveform Editor
Lesson 8 - Debugging with the Dataflow window
Lesson 9 - Viewing and initializing memories
Lesson 10 - Analyzing performance with the Profiler
Lesson 11 - Simulating with Code Coverage
Lesson 12 - Debugging with PSL assertions
Lesson 13 - Waveform Compare
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