【文件名】:06430@52RD_Synthesizing an ASIC for various.rar
【格 式】:rar
【大 小】:255K
【简 介】:This tutorial gives an introduction to the methodology of optimizing an ASIC for parameters like Area,Power and Delay. Various optimizing schemes like derving constraints on area and power,setting limits on timing requirement,Flattening logic,boolean optimization etc have been introduced here. The process mentioned below covers validation,optimization using synopsys tool at gate level.
【目 录】:无目录
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发表于 2006-4-30 14:31:00
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