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【文件名】:06425@52RD_Co-verification[1].of.Hardware.and.Software.for.ARM.SoC.Design.part1.rar
【格 式】:rar
【大 小】:1200K
【简 介】:Jason Andrews is currently working in the areas of hardware/software co-verification
and testbench methodology for SoC design at Verisity. He has implemented multiple
commercial co-verification tools as well as many custom co-verification solutions.
His experience in the EDA and embedded marketplace includes software development
and product management at Verisity, Axis Systems, Simpod, Summit Design,
and Simulation Technologies. He has presented technical papers and tutorials at the
Embedded Systems Conference, Communication Design Conference and IP/SoC
and written numerous articles related to HW/SW co-verification and design verification.
He has a B.S. in electrical engineering from The Citadel, Charleston, SC, and
an M.S. in electrical engineering from the University of Minnesota. He currently
lives in the Minneapolis area with his wife, Deborah, and their four children.
About Verisity
Verisity Ltd. (NASDAQ: VRST) is the leading provider of verification process
automation (VPA) solutions that automate and simplify the complete verification
process to increase productivity, predictability and quality. Verisity addresses critical
business issues with its verification systems and intellectual property (IP) that effectively
verify the design of electronic systems and complex integrated circuits for
the communications, computing and consumer electronics markets. Verisity’s VPA
solutions enable projects to move from an executable verification plan to unit, chip,
system and project level ‘total coverage’ and verification closure. Verisity is a global
organization with offices throughout Asia, Europe, and North America. For more
information, visit www.verisity.com and also look for the product summaries in the
Afterward at the end of this book.
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发表于 2006-4-25 16:52:00
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