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发表于 2012-3-1 13:42:42
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Place a 3 pF capacitor placeholder between the USB DP and DM lines. This capacitor should be placed near to the USB connector and should be installed initially; it can be removed on later revisions if there is no issue with the USB eye diagram. The integrated PHY has been designed to have rise times that are less than is allowed by the USB specification. The specification allows a minimum rise time of 500 ps, whereas the PHY rise times are generally less than this. The reason for this is that with a faster rise time, the PHY can tolerate more capacitance on the D+/- lines. For applications that do not have additional connections on D+/-, the rise time of the D+/- lines needs to be slowed down. QCT recommends placing a 2 pF capacitor between the D+/- lines to do this. |
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